Jeongbin Kim

Orcid: 0000-0002-5950-0056

Affiliations:
  • Yonsei University, Department of Electrical and Electronic Engineering, Seoul, South Korea


According to our database1, Jeongbin Kim authored at least 6 papers between 2016 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
STT-MRAM-Based Multicontext FPGA for Multithreading Computing Environment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022


2019
A Locality-Aware Compression Scheme for Highly Reliable Embedded Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018
CAD Tool Flow for Variation-Tolerant Non-Volatile STT-MRAM LUT based FPGA.
Proceedings of the 7th International Conference on Software and Computer Applications, 2018

2017
Timing window wiper: A new scheme for reducing refresh power of DRAM.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
FPGA power estimation simulator for dynamic input data.
Proceedings of the International SoC Design Conference, 2016


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