Jiangping Wu

According to our database, Jiangping Wu authored at least 4 papers in 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

An Analytical Gate Delay Model in Near/Subthreshold Domain Considering Process Variation.

Peng Cao, Zhiyuan Liu, Jingjing Guo, Jiangping Wu

IEEE Access, 2019

Accurate and Efficient Interdependent Timing Model for Flip-Flop in Wide Voltage Region.

Peng Cao, Zhiyuan Liu, Jingjing Guo, Haoyu Pang, Jiangping Wu, Jun Yang

Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

A Statistical Timing Model for Low Voltage Design Considering Process Variation.

Peng Cao, Zhiyuan Liu, Jiangping Wu, Jingjing Guo, Jun Yang, Longxing Shi

Proceedings of the International Conference on Computer-Aided Design, 2019

A Statistical Current and Delay Model Based on Log-Skew-Normal Distribution for Low Voltage Region.

Peng Cao, Jiangping Wu, Zhiyuan Liu, Jingjing Guo, Jun Yang, Longxing Shi

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019