Jim Aarestad

According to our database1, Jim Aarestad authored at least 7 papers between 2010 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2014
ASIC implementation of a hardware-embedded physical unclonable function.
IET Comput. Digit. Tech., 2014

2013
HELP: A Hardware-Embedded Delay PUF.
IEEE Des. Test, 2013

Error-tolerant bit generation techniques for use with a hardware-embedded path delay PUF.
Proceedings of the 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, 2013

2012
Modular FPGA-based software defined radio for CubeSats.
Proceedings of IEEE International Conference on Communications, 2012

2011
REBEL and TDC: Two embedded test structures for on-chip measurements of within-die path delay variations.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Characterizing within-die and die-to-die delay variations introduced by process variations and SOI history effect.
Proceedings of the 48th Design Automation Conference, 2011

2010
Detecting Trojans Through Leakage Current Analysis Using Multiple Supply Pad I<sub>DDQ</sub> s.
IEEE Trans. Inf. Forensics Secur., 2010


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