Fareena Saqib

According to our database, Fareena Saqib authored at least 37 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Secure Instruction and Data-Level Information Flow Tracking Model for RISC-V.

Geraldine Shirley Nicholas, Dhruvakumar Vikas Aklekar, Bhavin Thakar, Fareena Saqib

Cryptogr., September, 2023

2022

Dynamic Key Updates for LUT Locked Design.

Jakub Slowik, Gregory Williams, Rummah Albashir, Anthony Samagio, Geraldine Shirley Nicholas, Fareena Saqib

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

2021

A Secure Boot Framework with Multi-security Features and Logic-Locking Applications for Reconfigurable Logic.

Geraldine Shirley Nicholas, Ali Shuja Siddiqui, Sam Reji Joseph, Gregory Williams, Fareena Saqib

J. Hardw. Syst. Secur., 2021

A Delay-Based Machine Learning Model for DMA Attack Mitigation.

Yutian Gui, Chaitanya Bhure, Marcus Hughes, Fareena Saqib

Cryptogr., 2021

A SoC Design of TrustZone based Key Provisioning for FPGA IP Protection.

Gregory Williams, Jerry Aizprua, Mohammad Alhaddad, Doua Yang, Nabila BouSaba, Fareena Saqib

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

A Lightweight Delay-based Authentication Scheme for DMA Attack Mitigation.

Yutian Gui, Ali Shuja Siddiqui, Geraldine Shirley Nicholas, Marcus Hughes, Fareena Saqib

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Hardware Secure Execution and Simulation Model Correlation using IFT on RISC-V.

Geraldine Shirley Nicholas, Bhavin Thakar, Fareena Saqib

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020

Key Update Countermeasure for Correlation-Based Side-Channel Attacks.

Yutian Gui, Suyash Mohan Tamore, Ali Shuja Siddiqui, Fareena Saqib

J. Hardw. Syst. Secur., 2020

Secure Boot for Reconfigurable Architectures.

Ali Shuja Siddiqui, Yutian Gui, Fareena Saqib

Cryptogr., 2020

Side-Channel Power Resistance for Encryption Algorithms Using Implementation Diversity.

Ivan Bow, Nahome Bete, Fareena Saqib, Wenjie Che, Chintan Patel, Ryan W. Robucci, Calvin Chan, Jim Plusquellic

Cryptogr., 2020

A Survey and Analysis on SoC Platform Security in ARM, Intel and RISC-V Architecture.

Geraldine Shirley Nicholas, Yutian Gui, Fareena Saqib

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019

Physical Unclonable Function (PUF)-Based e-Cash Transaction Protocol (PUF-Cash).

Jeff Calhoun, Cyrus Minwalla, Charles Helmich, Fareena Saqib, Wenjie Che, Jim Plusquellic

Cryptogr., 2019

Multilayer Camouflaged Secure Boot for SoCs.

Ali Shuja Siddiqui, Geraldine Shirley, Sam Reji Joseph, Yutian Gui, Jim Plusquellic, Marten van Dijk, Fareena Saqib

Proceedings of the 20th International Workshop on Microprocessor/SoC Test, 2019

Secure Design Flow of FPGA Based RISC-V Implementation.

Ali Shuja Siddiqui, Geraldine Shirley, Shreya Bendre, Girija Bhagwat, Jim Plusquellic, Fareena Saqib

Proceedings of the 4th IEEE International Verification and Security Workshop, 2019

Blockchain Based Distributed Key Provisioning and Secure Communication over CAN FD.

Bryson Shannon, Spandana Etikala, Yutian Gui, Ali Shuja Siddiqui, Fareena Saqib

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Security Vulnerabilities of Smart Meters in Smart Grid.

Yutian Gui, Ali Shuja Siddiqui, Suyash Mohan Tamore, Fareena Saqib

Proceedings of the IECON 2019, 2019

2018

Novel Offset Techniques for Improving Bitstring Quality of a Hardware-Embedded Delay PUF.

Wenjie Che, Fareena Saqib, Jim Plusquellic

IEEE Trans. Very Large Scale Integr. Syst., 2018

An Autonomous, Self-Authenticating, and Self-Contained Secure Boot Process for Field-Programmable Gate Arrays.

Don Owen Jr., Derek Heeger, Calvin Chan, Wenjie Che, Fareena Saqib, Matthew Areno, Jim Plusquellic

Cryptogr., 2018

Hardware Assisted Security Architecture for Smart Grid.

Ali Shuja Siddiqui, Yutian Gui, David Lawrence, Stuart Laval, Jim Plusquellic, Madhav D. Manjrekar, Badrul H. Chowdhury, Fareena Saqib

Proceedings of the IECON 2018, 2018

Self-authenticating secure boot for FPGAs.

Goutham Pocklassery, Wenjie Che, Fareena Saqib, Matthew Areno, Jim Plusquellic

Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Delay model and machine learning exploration of a hardware-embedded delay PUF.

Wenjie Che, Manel Martínez-Ramón, Fareena Saqib, Jim Plusquellic

Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

2017

A Privacy-Preserving, Mutual PUF-Based Authentication Protocol.

Wenjie Che, Mitchell T. Martin, Goutham Pocklassery, Venkata K. Kajuluri, Fareena Saqib, Jim Plusquellic

Cryptogr., 2017

Leveraging Distributions in Physical Unclonable Functions.

Wenjie Che, Venkata K. Kajuluri, Fareena Saqib, Jim Plusquellic

Cryptogr., 2017

Analysis of Entropy in a Hardware-Embedded Delay PUF.

Wenjie Che, Venkata K. Kajuluri, Mitchell T. Martin, Fareena Saqib, Jim Plusquellic

Cryptogr., 2017

Hardware based protection against malwares by PUF based access control mechanism.

Ali Shuja Siddiqui, Chia-Che Lee, Fareena Saqib

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Secure communication over CANBus.

Ali Shuja Siddiqui, Yutian Gui, Jim Plusquellic, Fareena Saqib

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Physical unclonable functions and dynamic partial reconfiguration for security in resource-constrained embedded systems.

Goutham Pocklassery, Venkata K. Kajuruli, James F. Plusquellic, Fareena Saqib

Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

A novel offset method for improving bitstring quality of a Hardware-Embedded delay PUF.

Wenjie Che, Jim Plusquellic, Fareena Saqib

Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

Secure intra-vehicular communication over CANFD.

Ali Shuja Siddiqui, Chia-Che Lee, Wenjie Che, Jim Plusquellic, Fareena Saqib

Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017

2016

Poster: Hardware based security enhanced framework for automotives.

Ali Shuja Siddiqui, Yutian Gui, Jim Plusquellic, Fareena Saqib

Proceedings of the 2016 IEEE Vehicular Networking Conference, 2016

On detecting delay anomalies introduced by hardware trojans.

Dylan Ismari, Jim Plusquellic, Charles Lamech, Swarup Bhunia, Fareena Saqib

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2015

Within-Die Delay Variation Measurement and Power Transient Analysis Using REBEL.

Fareena Saqib, Dylan Ismari, Charles Lamech, Jim Plusquellic

IEEE Trans. Very Large Scale Integr. Syst., 2015

Pipelined Decision Tree Classification Accelerator Implementation in FPGA (DT-CAIF).

Fareena Saqib, Aindrik Dutta, Jim Plusquellic, Philip Ortiz, Marios S. Pattichis

IEEE Trans. Computers, 2015

PUF-Based Authentication.

Wenjie Che, Fareena Saqib, Jim Plusquellic

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

GDS-II Trojan detection using multiple supply pad VDD and GND IDDQs in ASIC functional units.

I. Wilcox, Fareena Saqib, James F. Plusquellic

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

Cyber-physical systems: A security perspective.

Charalambos Konstantinou, Michail Maniatakos, Fareena Saqib, Shiyan Hu, Jim Plusquellic, Yier Jin

Proceedings of the 20th IEEE European Test Symposium, 2015

2014

ASIC implementation of a hardware-embedded physical unclonable function.

Fareena Saqib, Matthew Areno, Jim Aarestad, James F. Plusquellic

IET Comput. Digit. Tech., 2014