Jinghai Wang

According to our database, Jinghai Wang authored at least 10 papers between 2014 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

An End-to-End Bundled-Data Asynchronous Circuits Design Flow: From RTL to GDS.

Jinghai Wang, Shanlin Xiao, Jilong Luo, Bo Li, Lingfeng Zhou, Zhiyi Yu

IEEE Trans. Very Large Scale Integr. Syst., January, 2025

A Time-Borrowing Method for High-Performance Bundled-Data Asynchronous Circuits.

Bohan Wang, Zeyang Xu, Lingfeng Zhou, Huiyao Wang, Jinghai Wang, Zhiyi Yu, Shanlin Xiao

Proceedings of the 26th International Symposium on Quality Electronic Design, 2025

FDAIMC: A Fully-Differential Analog In-Memory-Computing for MAC in MRAM with Accuracy Calibration Under Process and Voltage Variation.

Xiangyu Li, Weichong Chen, Ruida Hong, Jinghai Wang, Ningyuan Yin, Zhiyi Yu

Proceedings of the Design, Automation & Test in Europe Conference, 2025

SCSC: Leveraging Sparsity and Fault-Tolerance for Energy-Efficient Spiking Neural Networks.

Bo Li, Yue Liu, Wei Liu, Jinghai Wang, Xiao Huang, Zhiyi Yu, Shanlin Xiao

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024

Toward Efficient Asynchronous Circuits Design Flow Using Backward Delay Propagation Constraint.

Lingfeng Zhou, Shanlin Xiao, Huiyao Wang, Jinghai Wang, Zeyang Xu, Bohan Wang, Zhiyi Yu

IEEE Trans. Very Large Scale Integr. Syst., October, 2024

LAC: A Novel Lightweight Asynchronous Controller With Optimized Phase Shift.

Huiyao Wang, Shanlin Xiao, Lingfeng Zhou, Jinghai Wang, Zeyang Xu, Bohan Wang, Zhiyi Yu

IEEE Trans. Circuits Syst. II Express Briefs, August, 2024

Better-Than-Worst-Case: A Frequency Adaptation Asynchronous RISC-V Core With Vector Extension.

Lingfeng Zhou, Shanlin Xiao, Huiyao Wang, Jinghai Wang, Zeyang Xu, Bohan Wang, Zhiyi Yu

IEEE Trans. Very Large Scale Integr. Syst., June, 2024

An FPGA-based QDI Asynchronous Circuits Design Methodology.

Guangyao Lin, Jinghai Wang, Zeyang Xu, Zhiyi Yu, Shanlin Xiao

Proceedings of the IEEE International Conference on Integrated Circuits, 2024

An Efficient Asynchronous Circuits Design Flow with Backward Delay Propagation Constraint.

Lingfeng Zhou, Shanlin Xiao, Huiyao Wang, Jinghai Wang, Zeyang Xu, Bohan Wang, Zhiyi Yu

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2014

Hybrid Implicit Iteration Process for a Finite Family of Non-Self-Nonexpansive Mappings in Uniformly Convex Banach Spaces.

Qiaohong Jiang, Jinghai Wang, Jian-Hua Huang

J. Appl. Math., 2014