Jinho Ko

Orcid: 0000-0002-6154-8470

According to our database1, Jinho Ko authored at least 19 papers between 2004 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A -124-dBm Sensitivity Interference-Resilient Direct-Conversion Duty-Cycled Wake-Up Receiver Achieving 0.114 mW at 1.966-s Wake-Up Latency.
IEEE J. Solid State Circuits, 2023

2022
CMOS Fractional-N Frequency Synthesizer for UHF RFID Reader Applications With Transformer-Based ISF Manipulation VCO.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 915 MHz IoT Transmitter Employing Frequency Tripler and Digitally Controlled Duty-Cycle/Phase Calibration.
IEEE J. Solid State Circuits, 2022

A 0.3-to-1-GHz IoT Transmitter Employing Pseudo-Randomized Phase Switching Modulator and Single-Supply Class-G Harmonic Rejection PA.
IEEE J. Solid State Circuits, 2022

An LPWAN Radio with a Reconfigurable Data/Duty-Cycled-Wake-Up Receiver.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021
A Low-Noise and Fast-Settling UHF RFID Receiver With Digitally Controlled Leakage Cancellation.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

A -123-dBm Sensitivity Split-Channel BFSK Reconfigurable Data/Wake-Up Receiver for Low-Power Wide-Area Networks.
IEEE J. Solid State Circuits, 2021

A Sub-nW Single-Supply 32-kHz Sub-Harmonic Pulse Injection Crystal Oscillator.
IEEE J. Solid State Circuits, 2021

A Single-Supply Single-Core Inverse Class-D Digital Power Amplifier with Enhanced Power Back-Off Efficiency Adopting Output Power Scaling Technique.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2020
A 5 dBm 30.6% Efficiency 915 MHz Transmitter with $210\ \mu \mathrm{W}$ ULP PLL Employing Frequency Tripler and Digitally Controlled Duty/Phase Calibration Buffer.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2019
A 915 MHz, 499 μW, -99 dBm, and 100 kbps BFSK Direct Conversion Receiver.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2015
A 50-450 MHz Tunable RF Biquad Filter Based on a Wideband Source Follower With > 26 dBm IIP<sub>3</sub>, +12 dBm P<sub>1 dB</sub>, and 15 dB Noise Figure.
IEEE J. Solid State Circuits, 2015

2014
3.7 A fully integrated TV tuner front-end with 3.1dB NF, >+31dBm OIP3, >83dB HRR3/5 and >68dB HRR7.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
A new TX leakage-suppression technique for an RFID receiver using a dead-zone amplifier.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
An interference-aware 5.8GHz wake-up radio for ETCS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
An isolator-less CMOS RF front-end for UHF mobile RFID reader.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2005
A 19-mW 2.6-mm<sup>2</sup> L1/L2 dual-band CMOS GPS receiver.
IEEE J. Solid State Circuits, 2005

A CMOS 868/915 MHz direct conversion. ZigBee single-chip radio.
IEEE Commun. Mag., 2005

2004
L1/L2 dual-band CMOS GPS receiver.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004


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