Seungjin Kim
Orcid: 0000-0003-1037-9264
According to our database1,
Seungjin Kim
authored at least 18 papers
between 2012 and 2023.
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Bibliography
2023
A 208-MHz, 0.75-mW Self-Calibrated Reference Frequency Quadrupler for a 2-GHz Fractional-N Ring-PLL in 4-nm FinFET CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2023
A 2.4-to-4.2GHz 440.2fsrms-Integrated-Jitter 4.3mW Ring-Oscillator-Based PLL Using a Switched-Capacitor-Bias-Based Sampling PD in 4nm FinFET CMOS.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A Wide Frequency Range, Small Area and Low Supply Memory Interface PLL Using a Process and Temperature Variation Aware Current Reference in 3 nm Gate-All Around CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
A Single-Crystal-Oscillator-Based Clock-Management IC with 18× Start-Up Time Reduction and 0.68ppm/ºC Duty-Cycled Machine-Learning-Based RCO Calibration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A 52MHz -158.2dBc/Hz PN @ 100kHz Digitally Controlled Crystal Oscillator Utilizing a Capacitive-Load-Dependent Dynamic Feedback Resistor in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2020
Dynamic Impacts of Aspects of Appearance and Technology on Consumer Satisfaction: Empirical Evidence from the Smartphone Market.
Rev. Socionetwork Strateg., 2020
NB-IoT and GNSS All-In-One System-On-Chip Integrating RF Transceiver, 23-dBm CMOS Power Amplifier, Power Management Unit, and Clock Management System for Low Cost Solution.
IEEE J. Solid State Circuits, 2020
60-V Non-Inverting Four-Mode Buck-Boost Converter With Bootstrap Sharing for Non-Switching Power Transistors.
IEEE Access, 2020
A 4GHz 0.73psrms-Integrated-Jitter PVT-Insensitive Fractional-N Sub-Sampling Ring PLL with a Jitter-Tracking DLL-Assisted DTC.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
30.2 NB-IoT and GNSS All-in-One System-on-Chip Integrating RF Transceiver, 23dBm CMOS Power Amplifier, Power Management Unit and Clock Management System for Low-Cost Solution.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
Analysis and Classification of Urinary Stones Using Deep Learning Algorithm: A Clinical Application of Radiology-Common Data Model (R-CDM) Data Set.
Proceedings of the Intelligent Systems and Applications, 2020
Discrimination of Chronic Liver Disease in Non-contrast CT Images using CNN-Deep Learning.
Proceedings of the Intelligent Systems and Applications, 2020
Development of Web-Based Management System and Dataset for Radiology-Common Data Model (R-CDM) and Its Clinical Application in Liver Cirrhosis.
Proceedings of the Intelligent Systems and Applications, 2020
2019
A Blocker-Tolerant Direct Sampling Receiver for Wireless Multi-Channel Communication in 14nm FinFET CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2014
3.7 A fully integrated TV tuner front-end with 3.1dB NF, >+31dBm OIP3, >83dB HRR3/5 and >68dB HRR7.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2013
A Low-Noise Four-Stage Voltage-Controlled Ring Oscillator in Deep-Submicrometer CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
A low power low inaccuracy linearity-compensated temperature sensor for attachable medical devices.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
A quantization noise cancelling fractional-N type ΔΣ frequency synthesizer using SAR-based DAC gain calibration.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012