Jinli Yan

Orcid: 0000-0002-2762-1320

According to our database1, Jinli Yan authored at least 17 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Fenglin-I: An Open-Source Time-Sensitive Networking Chip Enabling Agile Customization.
IEEE Trans. Computers, 2023

2020
OpenTSN: an open-source project for time-sensitive networking system development.
CCF Trans. Netw., 2020

Indoor 3D Semantic Robot VSLAM Based on Mask Regional Convolutional Neural Network.
IEEE Access, 2020

TSNTag: a multi-semantic flow identification mechanism enabling full-custom TSN design.
Proceedings of the SIGCOMM '20: ACM SIGCOMM 2020 Conference, 2020

Fenglin-I: an open-source TSN chip for scenario-driven customization.
Proceedings of the SIGCOMM '20: ACM SIGCOMM 2020 Conference, 2020

A Hierarchical Model of Control Logic for Simplifying Complex Networks Protocol Design.
Proceedings of the Network and Parallel Computing, 2020

Injection Time Planning: Making CQF Practical in Time-Sensitive Networking.
Proceedings of the 39th IEEE Conference on Computer Communications, 2020

PPB: a Path-based Packet Batcher to Accelerate Vector Packet Processor.
Proceedings of the 15th International Conference on Computer Science & Education, 2020

Network Programming Interface in General-Purpose Multi-core Processor: A Survey.
Proceedings of the 15th International Conference on Computer Science & Education, 2020

On-line Traffic Scheduling optimization in IEEE 802.1Qch based Time-Sensitive Networks.
Proceedings of the 22nd IEEE International Conference on High Performance Computing and Communications; 18th IEEE International Conference on Smart City; 6th IEEE International Conference on Data Science and Systems, 2020

TSN-Builder: Enabling Rapid Customization of Resource-Efficient Switches for Time-Sensitive Networking.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
FAST: enabling fast software/hardware prototype for network experimentation.
Proceedings of the International Symposium on Quality of Service, 2019

UniSec: a unified security framework with SmartNIC acceleration in public cloud.
Proceedings of the ACM Turing Celebration Conference - China, 2019

2018
Demonstration of Path-Based Packet Batcher for Accelerating Vectorized Packet Processing.
Proceedings of the 15th Annual IEEE International Conference on Sensing, 2018

2016
Self-described buffer: A novel mechanism to improve packet I/O efficiency in Linux.
Proceedings of the 24th IEEE/ACM International Symposium on Quality of Service, 2016

2015
Towards high-performance packet processing on commodity multi-cores: current issues and future directions.
Sci. China Inf. Sci., 2015

2014
Protein fold recognition based on functional domain composition.
Comput. Biol. Chem., 2014


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