Jinlun Ji

Orcid: 0009-0009-5260-5726

According to our database1, Jinlun Ji authored at least 10 papers between 2022 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2026
An Adaptive Congestion-aware Approximate Communication (ACAC) scheme and implementation for Network-on-Chip systems.
Integr., 2026

2025
NAME: NoC-based Accelerators Mapping Exploration for High Performance DNN Inference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

FPGA-Par: An Efficient Algorithm for Elegant Partitioning in Multi-FPGA Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Optimizing Mixed-Precision DNN Scheduling on Heterogeneous SoCs for Enhanced Robustness and Efficiency.
Proceedings of the 7th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2025

2024
Automatic Generation and Optimization Framework of NoC-Based Neural Network Accelerator Through Reinforcement Learning.
IEEE Trans. Computers, December, 2024

HAS-RL: A Hierarchical Approximate Scheme Optimized With Reinforcement Learning for NoC-Based NN Accelerators.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024

TTNNM: Thermal- and Traffic-Aware Neural Network Mapping on 3D-NoC-based Accelerator.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

Four-class EEG Classification for Seizure Prediction and Detection Using a Lightweight CNN-LSTM.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2024

2022
AOME: Autonomous Optimal Mapping Exploration Using Reinforcement Learning for NoC-based Accelerators Running Neural Networks.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022

Work in Progress: ACAC: An Adaptive Congestion-aware Approximate Communication Mechanism for Network-on-Chip Systems.
Proceedings of the International Conference on Compilers, 2022


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