Jitendra Kanungo

According to our database, Jitendra Kanungo authored at least 6 papers between 2011 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

Energy Efficient Single Phase Adiabatic Logic and Its Application in Ripple Carry Adder Design.

Jitendra Kanungo, Jitendra Raghuwanshi, Deepak Sharma, Sudeb Dasgupta

Circuits Syst. Signal Process., January, 2026

2024

An error-efficient Gaussian filter for image processing by using the expanded operand decomposition logarithm multiplication.

Durgesh Nandan, Jitendra Kanungo, Anurag Mahajan

J. Ambient Intell. Humaniz. Comput., January, 2024

2017

An efficient VLSI architecture design for logarithmic multiplication by using the improved operand decomposition.

Durgesh Nandan, Jitendra Kanungo, Anurag Mahajan

Integr., 2017

2014

Sinusoidal Clocked Sense-amplifier-Based Energy Recovery flip-Flops.

Jitendra Kanungo, S. Dasgupta

J. Circuits Syst. Comput., 2014

2013

Energy estimation for n-input Adiabatic Logic gate: a Proposed Analytical Model.

Jitendra Kanungo, S. Dasgupta

J. Circuits Syst. Comput., 2013

2011

An Efficient Single Phase Adiabatic Logic and Its Application to Combinational and Sequential Design.

Jitendra Kanungo, S. Dasgupta

J. Low Power Electron., 2011