Jonas Bertels

Orcid: 0000-0002-0842-6167

According to our database1, Jonas Bertels authored at least 7 papers between 2023 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Area-Efficient LUT-Based Multipliers for AMD Versal FPGAs.
IACR Cryptol. ePrint Arch., 2026

2025
A High Throughput Kyber NTT.
IACR Cryptol. ePrint Arch., 2025

FINAL bootstrap acceleration on FPGA using DSP-free constant-multiplier NTTs.
IACR Cryptol. ePrint Arch., 2025

2024
OPTIMSM: FPGA hardware accelerator for Zero-Knowledge MSM.
IACR Cryptol. ePrint Arch., 2024

A Better Kyber Butterfly for FPGAs.
Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

Hardware Acceleration of the Prime-Factor and Rader NTT for BGV Fully Homomorphic Encryption.
Proceedings of the 31st IEEE Symposium on Computer Arithmetic, 2024

2023
Hardware Acceleration of FHEW.
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023


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