Michiel Van Beirendonck

Orcid: 0000-0002-5131-8030

According to our database1, Michiel Van Beirendonck authored at least 19 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2024
Hardware Acceleration of the Prime-Factor and Rader NTT for BGV Fully Homomorphic Encryption.
IACR Cryptol. ePrint Arch., 2024

2023
Revisiting Higher-Order Masked Comparison for Lattice-Based Cryptography: Algorithms and Bit-Sliced Implementations.
IEEE Trans. Computers, February, 2023

BASALISC: Programmable Hardware Accelerator for BGV Fully Homomorphic Encryption.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023

Neural Network Quantisation for Faster Homomorphic Encryption.
IACR Cryptol. ePrint Arch., 2023

Hardware Acceleration of FHEW.
IACR Cryptol. ePrint Arch., 2023

FPT: A Fixed-Point Accelerator for Torus Fully Homomorphic Encryption.
Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security, 2023

2022
Masked Accelerators and Instruction Set Extensions for Post-Quantum Cryptography.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Higher-Order Masked Ciphertext Comparison for Lattice-Based Cryptography.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Higher-order masked Saber.
IACR Cryptol. ePrint Arch., 2022

BASALISC: Flexible Asynchronous Hardware Accelerator for Fully Homomorphic Encryption.
IACR Cryptol. ePrint Arch., 2022

FPT: a Fixed-Point Accelerator for Torus Fully Homomorphic Encryption.
IACR Cryptol. ePrint Arch., 2022

Mining CryptoNight-Haven on the Varium C1100 Blockchain Accelerator Card.
Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

2021
Attacking and Defending Masked Polynomial Comparison for Lattice-Based Cryptography.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

Analysis and Comparison of Table-based Arithmetic to Boolean Masking.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

A Side-Channel-Resistant Implementation of SABER.
ACM J. Emerg. Technol. Comput. Syst., 2021

2020
A Standalone FPGA-Based Miner for Lyra2REv2 Cryptocurrencies.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

2019
FPGA-based Mining of Lyra2REv2 Cryptocurrencies.
CoRR, 2019

A Lyra2 FPGA Core for Lyra2REv2-Based Cryptocurrencies.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
A Lyra2 FPGA Implementation for Lyra2REv2-Based Cryptocurrencies.
CoRR, 2018


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