Jong-Pil Im

According to our database1, Jong-Pil Im authored at least 9 papers between 2012 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2020
Recent Advancements in Emerging Neuromorphic Device Technologies.
Adv. Intell. Syst., 2020

Impact of Variability Issues of Resistive Memory Synapses on Pattern Recognition Systems.
Proceedings of the International SoC Design Conference, 2020

2019
Wafer-Level-Based Open-Circuit Sensitivity Model from Theoretical ALEM and Empirical OSCM Parameters for a Capacitive MEMS Acoustic Sensor.
Sensors, 2019

2014
23.5 An energy pile-up resonance circuit extracting maximum 422% energy from piezoelectric material in a dual-source energy-harvesting interface.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

17.3 A 0.9V 6.3μW multistage amplifier driving 500pF capacitive load with 1.34MHz GBW.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2012
A 40 mV Transformer-Reuse Self-Startup Boost Converter With MPPT Control for Thermoelectric Energy Harvesting.
IEEE J. Solid State Circuits, 2012

High area-efficient DC-DC converter using Time-Mode Miller Compensation (TMMC).
Proceedings of the Symposium on VLSI Circuits, 2012

A 40mV transformer-reuse self-startup boost converter with MPPT control for thermoelectric energy harvesting.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A 0.791mm<sup>2</sup> fully on-chip controller with self-error-correction for boost DC-DC converter based on Zero-Order Control.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012


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