Wanyuan Qu
Orcid: 0000-0002-8318-9878
According to our database1,
Wanyuan Qu authored at least 38 papers
between 2014 and 2026.
Collaborative distances:
Collaborative distances:
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Bibliography
2026
A Compact On-Substrate-Integrated Converter With 91% Peak Efficiency and Over 80% Efficiency Across a Wide Load Range.
IEEE Trans. Very Large Scale Integr. Syst., March, 2026
Microelectron. J., 2026
26.2 A Compact 4Vin 93.4%-Peak-Efficiency 12A Load and 20mV Undershoot Resonant Sigma Converter with PCB-Embedded Converter-on-Substrate Packaging.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
A 0.6V 976nW 93.5dB-SNDR Charge-Pump ADC with 183.6dB-FoMs Using Passive-Reference Boost and NS-Assisted Charge-Balance-Calibration.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2026
2025
A 15-bit BW/Power Scalable Pseudo-Pseudo-Differential MASH ADC Using an Adaptively Biased Inverter Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs, December, 2025
A Two-Stage 12-1-V Converter Featuring Regulated Resonant SC Regulators and Collaborative Control Scheme.
IEEE J. Solid State Circuits, December, 2025
IEEE Trans. Circuits Syst. II Express Briefs, November, 2025
IEEE Trans. Circuits Syst. II Express Briefs, November, 2025
A High-Efficiency 12/1-V Dual-Path Series-Capacitor Converter With Low V⋅A Metric and Full Duty Range.
IEEE J. Solid State Circuits, May, 2025
An 871 nW 96.2 dB SNDR Pipelined Second-Order Noise-Shaping SAR ADC Employing Charge-Efficient CLS-Assisted Residue Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2025
A 62.2dB SNDR Event-Driven Level-Crossing ADC With SAR-Assisted Delay Compensation Loop for Time-Sparse Biomedical Signal Acquisition.
IEEE Trans. Biomed. Circuits Syst., April, 2025
A 30-70MHz Delay-Line-Based Multiphase 50A 5.14 A/mm² Fully Integrated Voltage Regulator.
IEEE Open J. Circuits Syst., 2025
A 95.43%-Peak-Efficiency Buck Converter With Seamless PWM/PFM Transition and 12.3-μA Quiescent Current for Wide-Load Applications.
IEEE Access, 2025
A 12A 89.3% Peak Efficiency and 26mV Undershoot 12-to-1V Two-Stage Converter with Regulated Resonant Switched-Capacitor Regulators.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
2024
A Compact Dickson Hybrid Boost Converter With 5-mV Input 90.5% Peak Efficiency and On-Chip Cold-Start for Thermoelectric Energy Harvesting.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2024
IEEE J. Solid State Circuits, May, 2024
A 60-nA IQ 96.5% Peak Efficiency Buck Converter with Wide Load Range for Internet of Things.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the IEEE International Conference on Integrated Circuits, 2024
An 871nW 96.2dB-SNDR Pipelined NS SAR ADC Achieving 180.8dB-FoMSNDR with a Charge-Efficient CLS-Assisted Two-Stage FIA.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
2023
A 36-55 V Input 0.6-2.5 V Output Bypass-Assist Series-Capacitor Power Converter With 93.1% Peak Efficiency and 1.5 mA-5 A Load Range.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023
IEEE J. Solid State Circuits, September, 2023
IEEE J. Solid State Circuits, 2023
A 5A 94.5% Peak Efficiency 9~16V-to-1V Dual-Path Series-Capacitor Converter with Full Duty Range and Low V.A Metric.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A 1.2V 62.2dB SNDR SAR-Assisted Event-Driven Clockless Level-Crossing ADC for Time-Sparse Signal Acquisition.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
2022
A 4-μW Bandwidth/Power Scalable Delta-Sigma Modulator Based on Swing-Enhanced Floating Inverter Amplifiers.
IEEE J. Solid State Circuits, 2022
A 5V Input 98.4% Peak Efficiency Reconfigurable Capacitive-Sigma Converter With Greater than 90% Peak Efficiency for the Entire 0.4~1.2V Output Range.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A 2.87μW 1kHz-BW 94.0dB-SNDR 2-0 MASH ADC Using FIA with Dynamic-Body-Biasing Assisted CLS Technique.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A Dickson Hybrid Boost Converter With On-Chip Cold-Start for Thermoelectric Energy Harvesting.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
A 12-Level Series-Capacitor 48-1V DC-DC Converter With On-Chip Switch and GaN Hybrid Power Conversion.
IEEE J. Solid State Circuits, 2021
33.4 An 8A 998A/inch3 90.2% Peak Efficiency 48V-to-1V DC-DC Converter Adopting On-Chip Switch and GaN Hybrid Power Conversion.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
A 94.1 dB DR 4.1 nW/Hz Bandwidth/Power Scalable DTDSM for IoT Sensing Applications Based on Swing-Enhanced Floating Inverter Amplifiers.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2020
A 9.3mV Load and 5.2mV Line transients Fast Response Buck Converter with Active Ramping Voltage Mode Control.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
2019
A 95.3% Peak Efficiency 38mV overshoot and 5mV/A load regulation Hysteretic Boost Converter with Anti-Phase Emulate Current Control.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
2018
A 95.2% efficiency dual-path DC-DC step-up converter with continuous output current delivery and low voltage ripple.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2017
Design-Oriented Analysis for Miller Compensation and Its Application to Multistage Amplifier Design.
IEEE J. Solid State Circuits, 2017
A 200-mA Digital Low Drop-Out Regulator With Coarse-Fine Dual Loop in Mobile Application Processor.
IEEE J. Solid State Circuits, 2017
2014
17.3 A 0.9V 6.3μW multistage amplifier driving 500pF capacitive load with 1.34MHz GBW.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014