Wanyuan Qu

According to our database1, Wanyuan Qu authored at least 9 papers between 2014 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2021
An Impedance Adapting Compensation Scheme for High Current NMOS LDO Design.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

33.4 An 8A 998A/inch3 90.2% Peak Efficiency 48V-to-1V DC-DC Converter Adopting On-Chip Switch and GaN Hybrid Power Conversion.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A 94.1 dB DR 4.1 nW/Hz Bandwidth/Power Scalable DTDSM for IoT Sensing Applications Based on Swing-Enhanced Floating Inverter Amplifiers.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020
A 9.3mV Load and 5.2mV Line transients Fast Response Buck Converter with Active Ramping Voltage Mode Control.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
A 95.3% Peak Efficiency 38mV overshoot and 5mV/A load regulation Hysteretic Boost Converter with Anti-Phase Emulate Current Control.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018
A 95.2% efficiency dual-path DC-DC step-up converter with continuous output current delivery and low voltage ripple.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
Design-Oriented Analysis for Miller Compensation and Its Application to Multistage Amplifier Design.
IEEE J. Solid State Circuits, 2017

A 200-mA Digital Low Drop-Out Regulator With Coarse-Fine Dual Loop in Mobile Application Processor.
IEEE J. Solid State Circuits, 2017

2014
17.3 A 0.9V 6.3μW multistage amplifier driving 500pF capacitive load with 1.34MHz GBW.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014


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