Jiyong Woo
Orcid: 0000-0002-3169-1612
According to our database1,
Jiyong Woo
authored at least 14 papers
between 2013 and 2024.
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Bibliography
2024
Improvement of the Symmetry and Linearity of Synaptic Weight Update by Combining the InGaZnO Synaptic Transistor and Memristor.
IEEE Access, 2024
2023
Brain-Inspired Mutual Synchronization in Cross-Coupled NbO<sub>x</sub> Oscillation Neurons for Oscillatory Neural Network Applications.
IEEE Access, 2023
2021
Two- and three-terminal HfO2-based multilevel resistive memories for neuromorphic analog synaptic elements.
Neuromorph. Comput. Eng., 2021
Device Engineering Strategy of Zr-Doped HfOx Ferroelectric Memory for Unconventional Computing Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
Adv. Intell. Syst., 2020
Impact of Variability Issues of Resistive Memory Synapses on Pattern Recognition Systems.
Proceedings of the International SoC Design Conference, 2020
2019
Impact of Selector Devices in Analog RRAM-Based Crossbar Arrays for Inference and Training of Neuromorphic System.
IEEE Trans. Very Large Scale Integr. Syst., 2019
Design Space Exploration of Ovonic Threshold Switch (OTS) for Sub-Threshold Read Operation in Cross-Point Memory Arrays.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Design Considerations of Selector Device in Cross-Point RRAM Array for Neuromorphic Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Proceedings of the 17th Non-Volatile Memory Technology Symposium, 2017
Enhancement of CBRAM performance by controlled formation of a hourglass-shaped filament.
Proceedings of the 17th Non-Volatile Memory Technology Symposium, 2017
2016
Full chip integration of 3-d cross-point ReRAM with leakage-compensating write driver and disturbance-aware sense amplifier.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
A two-step set operation for highly uniform resistive swtiching ReRAM by controllable filament.
Proceedings of the European Solid-State Device Research Conference, 2013