Jongpil Jung

According to our database1, Jongpil Jung authored at least 13 papers between 2010 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2016
Hybrid L2 NUCA Design and Management Considering Data Access Latency, Energy Efficiency, and Storage Lifetime.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2014
Runtime 3-D stacked cache data management for energy minimization of 3-D chip-multiprocessors.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

A low-energy video event data recorder using dual image/video codec.
Proceedings of the 11th IEEE International Conference on Advanced Video and Signal Based Surveillance, 2014

2013
Static energy minimization of 3D stacked L2 cache with selective cache compression.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Runtime 3-D stacked cache management for chip-multiprocessors.
Proceedings of the International Symposium on Quality Electronic Design, 2013

2012
Cost-effective TSV redundancy configuration.
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

Temperature-aware energy minimization of 3D-stacked L2 DRAM cache through DVFS.
Proceedings of the International SoC Design Conference, 2012

Hybrid cache architecture replacing SRAM cache with future memory technology.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Energy-Aware Operation of Black Box Surveillance Cameras under Event Uncertainty and Memory Constraint.
Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, 2012

2011
Maximizing throughput of temperature-constrained multi-core systems with 3D-stacked cache memory.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

Design and management of 3D-stacked NUCA cache for chip multiprocessors.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

2010
A Dynamic Search Range Algorithm for Stabilized Reduction of Memory Traffic in Video Encoder.
IEEE Trans. Circuits Syst. Video Technol., 2010

Latency-aware Utility-based NUCA Cache Partitioning in 3D-stacked multi-processor systems.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010


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