Jörg Keller

According to our database1, Jörg Keller
  • authored at least 111 papers between 1988 and 2017.
  • has a "Dijkstra number"2 of four.

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Bibliography

2017
Contactless Vulnerability Analysis using Google and Shodan.
J. UCS, 2017

Asymmetric Crown Scheduling.
Proceedings of the 25th Euromicro International Conference on Parallel, 2017

Fault-Tolerant Parallel Execution of Workflows with Deadlines.
Proceedings of the 25th Euromicro International Conference on Parallel, 2017

Hardware and Software Support for Transposition of Bit Matrices in High-Speed Encryption.
Proceedings of the Network and System Security - 11th International Conference, 2017

Towards Covert Channels in Cloud Environments: A Study of Implementations in Virtual Networks.
Proceedings of the Digital Forensics and Watermarking - 16th International Workshop, 2017

Secure genomic data evaluation in cloud environments.
Proceedings of the 2017 International Symposium on Networks, Computers and Communications, 2017

Tweaking cryptographic primitives with moderate state space by direct manipulation.
Proceedings of the IEEE International Conference on Communications, 2017

Workload Type-Aware Scheduling on big.LITTLE Platforms.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2017

Using Open Source Based Distributed Agents to Perform Digital Investigation in Virtual Environments.
Proceedings of the 47. Jahrestagung der Gesellschaft für Informatik, 2017

A New Data-Hiding Approach for IP Telephony Applications with Silence Suppression.
Proceedings of the 12th International Conference on Availability, Reliability and Security, Reggio Calabria, Italy, August 29, 2017

2016
Micro protocol engineering for unstructured carriers: on the embedding of steganographic control protocols into audio transmissions.
Security and Communication Networks, 2016

Accurate energy modeling for many-core static schedules with streaming applications.
Microprocessors and Microsystems - Embedded Hardware Design, 2016

Security, Privacy and Reliability of Smart Buildings.
J. UCS, 2016

Energy-Optimized Static Scheduling for Many-Cores with Task Parallelization, DVFS and Core Consolidation.
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016

Structural improvements of chaotic PRNG implementations.
Proceedings of the 11th International Conference for Internet Technology and Secured Transactions, 2016

2015
A Case Study on Covert Channel Establishment via Software Caches in High-Assurance Computing Systems.
CoRR, 2015

Micro protocol engineering for unstructured carriers: On the embedding of steganographic control protocols into audio transmissions.
CoRR, 2015

Fast Crown Scheduling Heuristics for Energy-Efficient Mapping and Scaling of Moldable Streaming Tasks on Many-Core Systems.
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems, 2015

Accurate Energy Modelling for Many-Core Static Schedules.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

Energy-Efficient Task Scheduling in Manycore Processors with Frequency Scaling Overhead.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

Improving Energy-Efficiency of Static Schedules by Core Consolidation and Switching Off Unused Cores.
Proceedings of the Parallel Computing: On the Road to Exascale, 2015

Towards Practical Homomorphic Encryption in Cloud Computing.
Proceedings of the Fourth IEEE Symposium on Network Cloud Computing and Applications, 2015

Using network data to improve digital investigation in cloud computing environments.
Proceedings of the 2015 International Conference on High Performance Computing & Simulation, 2015

Security aspects of PRNGs with large state spaces.
Proceedings of the 10th International Conference for Internet Technology and Secured Transactions, 2015

2014
Fast Crown Scheduling Heuristics for Energy-Efficient Mapping and Scaling of Moldable Streaming Tasks on Manycore Systems.
TACO, 2014

A Taxonomy for Attack Patterns on Information Flows in Component-Based Operating Systems.
CoRR, 2014

H2rs: Deducing evolutionary and functionally important residue positions by means of an entropy and similarity based analysis of multiple sequence alignments.
BMC Bioinformatics, 2014

Hidden and under control - A survey and outlook on covert channel-internal control protocols.
Annales des Télécommunications, 2014

2013
In Guards We Trust: Security and Privacy in Operating Systems Revisited.
Proceedings of the International Conference on Social Computing, SocialCom 2013, 2013

Crown scheduling: Energy-efficient resource allocation, mapping and discrete frequency scaling for collections of malleable streaming tasks.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

Efficient and Fault-Tolerant Static Scheduling for Grids.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Energy-Efficient and Fault-Tolerant Taskgraph Scheduling for Manycores and Grids.
Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

2012
Securing cloud-based computations against malicious providers.
Operating Systems Review, 2012

Engineering Parallel Sorting for the Intel SCC.
Proceedings of the International Conference on Computational Science, 2012

Executing PRAM Programs on GPUs.
Proceedings of the International Conference on Computational Science, 2012

Optimized On-Chip-Pipelining for Memory-Intensive Computations on Multi-Core Processors with Explicit Memory Hierarchy.
J. UCS, 2012

A structural analysis of the A5/1 state transition graph
Proceedings of the Proceedings First Workshop on GRAPH Inspection and Traversal Engineering, 2012

Modelling Power Consumption of the Intel SCC.
Proceedings of the 6th Many-core Applications Research Community (MARC) Symposium. Proceedings of the 6th MARC Symposium, 2012

Dynamic routing in covert channel overlays based on control protocols.
Proceedings of the 7th International Conference for Internet Technology and Secured Transactions, 2012

Systematic Engineering of Control Protocols for Covert Channels.
Proceedings of the Communications and Multimedia Security, 2012

2011
Balancing CPU Load for Irregular MPI Applications.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

Investigation of main memory bandwidth on Intel Single-Chip Cloud Computer.
Proceedings of the 3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, 2011

Low-Attention Forwarding for Mobile Network Covert Channels.
Proceedings of the Communications and Multimedia Security, 2011

A Parallel Fault-tolerant Routing Algorithm for Real-Time Media Transmission.
Proceedings of the ARCS 2011, 2011

Simulating fault injection on disk arrays.
Proceedings of the ARCS 2011, 2011

2010
Real-Time Fault-Tolerant Routing in High-Availability Multicast-Aware Video Networks.
Proceedings of the Sicherheit 2010: Sicherheit, 2010

Quantifying the Attack Surface of a Web Application.
Proceedings of the Sicherheit 2010: Sicherheit, 2010

Performance Impact of Task Mapping on the Cell BE Multicore Processor.
Proceedings of the Computer Architecture, 2010

Optimizing RAID for long term data archives.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

Optimized On-Chip-Pipelined Mergesort on the Cell/B.E.
Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010

Evaluation and Refinement of a Tuning Tool for Grid Applications.
Proceedings of the ARCS '10, 2010

2009
Storage architecture with integrity, redundancy and encryption.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Guiding performance tuning for grid schedules.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Optimizing a highly fault tolerant software RAID for many core systems.
Proceedings of the 2009 International Conference on High Performance Computing & Simulation, 2009

2008
An Efficient Algorithm for Computing the Reliability of Consecutive-k-Out-Of-n: F Systems.
IEEE Trans. Reliability, 2008

Optimized on-chip pipelining of memory-intensive computations on the cell BE.
SIGARCH Computer Architecture News, 2008

Implementing Hirschberg's PRAM-Algorithm for Connected Components on a Global Cellular Automaton.
Int. J. Found. Comput. Sci., 2008

Fault-tolerant static scheduling for grids.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Optimized Pipelined Parallel Merge Sort on the Cell BE.
Proceedings of the Euro-Par 2008 Workshops, 2008

Hybrid Parallel Sort on the Cell Processor.
Proceedings of the 9th Workshop on Parallel Systems and Algorithms (PASA) held at the 21st Conference on the Architecture of Computing Systems (ARCS), 2008

2007
Parallel-External Computation of the Cycle Structure of Invertible Cryptographic Functions.
Proceedings of the 15th Euromicro International Conference on Parallel, 2007

Implementing Hirschberg's PRAM-Algorithm for Connected Components on a Global Cellular Automaton.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Hirschberg's Algorithm on a GCA and Its Parallel Hardware Implementation.
Proceedings of the Euro-Par 2007, 2007

2006
Remote operation and control of computer engineering laboratory experiments.
Proceedings of the 2006 Workshop on Computer Architecture Education, 2006

A Distributed Query Structure to Explore Random Mappings in Parallel.
Proceedings of the 14th Euromicro International Conference on Parallel, 2006

A System for Secure IP Telephone Conferences.
Proceedings of the Fifth IEEE International Symposium on Network Computing and Applications, 2006

Web server protection by customized instruction set encoding.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

A Collaborative Virtual Computer Security Lab.
Proceedings of the Second International Conference on e-Science and Grid Technologies (e-Science 2006), 2006

FireCrocodile: A Checker for Static Firewall Configurations.
Proceedings of the 2006 International Conference on Security & Management, 2006

Combining SMTP and HTTP tar Pits to Proactively Reduce Spam.
Proceedings of the 2006 International Conference on Security & Management, 2006

Design of a virtual computer security lab.
Proceedings of the Third IASTED International Conference on Communication, 2006

Dynamically blocking access to web pages for spammers' harvesters.
Proceedings of the Third IASTED International Conference on Communication, 2006

A simple parallel algorithm for the stepwise approximate computation of Voronoi diagrams of line segments.
Proceedings of the ARCS 2006, 2006

Error-Correcting Codes in Steganography.
Proceedings of the ARCS 2006, 2006

2005
Thread-Based Virtual Duplex Systems in Embedded Environments.
IEEE Micro, 2005

2004
Internet-basierter Übungsbetrieb in Technischer Informatik (Web-Based Exercises in Computer Engineering).
it - Information Technology, 2004

A combined virtual and remotely accessible microprocessor laboratory.
Proceedings of the 2004 workshop on Computer architecture education, 2004

Improving http-server performance by adapted multithreading.
Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2004

A Fault-Tolerant Voting Scheme for Multithreaded Environments.
Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004

Performance Estimation of Virtual Duplex Systems on Simultaneous Multithreaded Processors.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Implementation and Evaluation of a Parallel-External Algorithm for Cycle Structure Computation on a PC-Cluster.
Proceedings of the ARCS 2004, 2004

2003
Evaluation of Thread-Based Virtual Duplex Systems in Embedded Environments.
Proceedings of the INFORMATIK 2003 - Mit Sicherheit Informatik, Schwerpunkt "Sicherheit - Schutz und Zuverlässigkeit", 29. September, 2003

2002
A heuristic to accelerate in-situ permutation algorithms.
Inf. Process. Lett., 2002

2001
Einsatz von neuen Medien an der FernUniversität Hagen.
it+ti - Informationstechnik und Technische Informatik, 2001

Beyond External Computing: Analysis of the Cycle Structure of Permutations.
Proceedings of the Euro-Par 2001: Parallel Processing, 2001

Practical PRAM programming.
Wiley series on parallel and distributed computing, Wiley, 2001

2000
J.UCS Special Issue on Multithreaded Processors and Chip-Multiprocessors.
J. UCS, 2000

VRML with constraints.
Proceedings of the Fifth Symposium on Virtual Reality Modeling Language, 2000

1999
J.UCS Special Issue on Dependability Evaluation and Validation.
J. UCS, 1999

On the Cost-Effectiveness of PRAMs.
Acta Inf., 1999

A New Data Structure for Shannon Decomposition.
Proceedings of the Workshops zur Architektur von Rechensystemen, 1999

Virtual Duplex Systems in Embedded Environments.
Proceedings of the Workshops zur Architektur von Rechensystemen, 1999

Effizienzverbesserungen durch schlüssel-optimierte Ver- und Entschlüsselung in Workstations.
Proceedings of the Architektur von Rechensystemen, Systemarchitektur auf dem Weg ins 3. Jahrtausend: Neue Strukturen, Konzepte, Verfahren und Bewertungsmethoden, 1999

1997
A Note on Correctness Proofs for Overflow Detection Logic in Adders for d-th Complement Numbers.
J. UCS, 1997

Parallel Software Caches.
Proceedings of the Solving Irregularly Structured Problems in Parallel, 1997

1996
Fast Rehashing in PRAM Emulations.
Theor. Comput. Sci., 1996

Conservative Circuit Simulation on Shared-Memory Multiprocessors.
Proceedings of the Tenth Workshop on Parallel and Distributed Simulation, 1996

HPP: A High Performance PRAM.
Proceedings of the Euro-Par '96 Parallel Processing, 1996

1995
Fast Parallel Permutation Algorithms.
Parallel Processing Letters, 1995

A Note on Implementing Combining Networks.
Inf. Process. Lett., 1995

Generalized Fisheye Views of Graphs.
Proceedings of the Graph Drawing, Symposium on Graph Drawing, GD '95, Passau, 1995

1994
Regular layouts of butterfly networks.
Integration, 1994

Realization of PRAMs: Processor Design.
Proceedings of the Distributed Algorithms, 8th International Workshop, 1994

Applications of PRAMs in Telecommunications.
Proceedings of the Technology and Foundations - Information Processing '94, Volume 1, Proceedings of the IFIP 13th World Computer Congress, Hamburg, Germany, 28 August, 1994

1993
Reduction of Network Cost and Wiring in Ranade's Butterfly Routing.
Inf. Process. Lett., 1993

On the Physical Design of PRAMs.
Comput. J., 1993

Simulation-based Comparison of Hash Functions for Emulated Shared Memory.
Proceedings of the PARLE '93, 1993

1992
Zur Realisierbarkeit des PRAM Modelles.
PhD thesis, 1992

1991
On the cost-effectiveness of PRAMs.
Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing, 1991

1990
Überblick über PRAM-Simulationen und ihre Realisierbarkeit.
Proceedings of the Entwurf und Betrieb verteilter Systeme, 1990

1988
Implementierung eines informationstheoretischen Ansatzes zur Bilderkennung.
Proceedings of the Innovative Informations-Infrastrukturen, 1988


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