Flavius Gruian

Orcid: 0000-0003-1739-3384

According to our database1, Flavius Gruian authored at least 32 papers between 1998 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Scalable Actor Networks with CAL.
Proceedings of the 21st ACM-IEEE International Symposium on Formal Methods and Models for System Design, 2023

2022
Estimating Stream Application Performance in Early-Stage System Design.
Proceedings of the 56th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2022, Pacific Grove, CA, USA, October 31, 2022

Analysing Dataflow Programs with Causation Traces.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

2016
Memory Power Management for Java Processors Using Heap Partitioning and Power Gating.
Proceedings of the 14th International Workshop on Java Technologies for Real-Time and Embedded Systems, 2016

Code generation for a SIMD architecture with custom memory organisation.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

2015
A Comparative Study of Scheduling Techniques for Multimedia Applications on SIMD Pipelines.
CoRR, 2015

Programming support for reconfigurable custom vector architectures.
Proceedings of the Sixth International Workshop on Programming Models and Applications for Multicores and Manycores, 2015

Application-set driven exploration for custom processor architectures.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2014
Mapping streaming applications on multiprocessors with time-division-multiplexed network-on-chip.
Comput. Electr. Eng., 2014

2013
Hardware support for CSP on a Java chip multiprocessor.
Microprocess. Microsystems, 2013

Design space exploration for streaming applications on multiprocessors with guaranteed service NoC.
Proceedings of the Network on Chip Architectures, 2013

2012
Java bytecode to hardware made easy with bluespec system verilog.
Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems, 2012

Robust and flexible mapping for real-time distributed applications during the early design phases.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

High-level architecture modeling and exploration for streaming applications.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

Runtime voltage/frequency scaling for energy-aware streaming applications.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

2011
Energy/reliability trade-offs in fault-tolerant event-triggered distributed embedded systems.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Investigating hardware micro-instruction folding in a Java embedded processor.
Proceedings of the 8th International Workshop on Java Technologies for Real-Time and Embedded Systems, 2010

2008
VHDL vs. Bluespec system verilog: a case study on a Java embedded architecture.
Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), 2008

2007
BluEJAMM: A Bluespec Embedded Java Architecture with Memory Management.
Proceedings of the Ninth International Symposium on Symbolic and Numeric Algorithms for Scientific Computing, 2007

BlueJEP: a flexible and high-performance Java embedded processor.
Proceedings of the 5th International Workshop on Java Technologies for Real-time and Embedded Systems, 2007

2006
A Scheduler Support Unit for Reactive Microprocessors.
Proceedings of the 12th IEEE Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2006), 2006

The SystemJ approach to system-level design.
Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006

2005
Automatic generation of application-specific systems based on a micro-programmed Java core.
Proceedings of the 2005 ACM Symposium on Applied Computing (SAC), 2005

Designing a Concurrent Hardware Garbage Collector for Small Embedded Systems.
Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

2003
Uncertainty-based scheduling: energy-efficient ordering for tasks with variable execution time.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

2002
Energy-Centric Scheduling for Real-Time Systems.
PhD thesis, 2002

2001
Hard real-time scheduling for low-energy using stochastic data and DVS processors.
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

LEneS: task scheduling for low-energy systems using variable supply voltage processors.
Proceedings of ASP-DAC 2001, 2001

2000
System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors.
Proceedings of the Power-Aware Computer Systems, First International Workshop, 2000

Digital Systems Design Using Constraint Logic Programming.
Proceedings of the Second International Conference on the Practical Application of Constraint Technologies and Logic Programming, 2000

1999
Low-Energy Directed Architecture Selection and Task Scheduling for System-Level Design.
Proceedings of the 25th EUROMICRO '99 Conference, 1999

1998
Operation Binding and Scheduling for Low Power Using Constraint Logic Programming.
Proceedings of the 24th EUROMICRO '98 Conference, 1998


  Loading...