Jorge Fernandez Villena
Orcid: 0000-0002-0847-9090Affiliations:
- Cadence Design Systems Inc., Munich, Germany
- Technical University of Lisbon, Instituto Superior Técnico, Portugal (PhD 2010)
According to our database1,
Jorge Fernandez Villena
authored at least 15 papers
between 2007 and 2017.
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Bibliography
2017
Circuit Synthesis for Guaranteed Positive Sparse Realization of Passive State-Space Models.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
2016
Fast Electromagnetic Analysis of MRI Transmit RF Coils Based on Accelerated Integral Equation Methods.
IEEE Trans. Biomed. Eng., 2016
Variability and statistical analysis flow for dynamic linear systems with large number of inputs.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2014
Stable FFT-JVIE solvers for fast analysis of highly inhomogeneous dielectric objects.
J. Comput. Phys., 2014
Efficient analysis of variability impact on interconnect lines and resistor networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2012
Exploiting Parallelism for Improved Automation of Multidimensional Model Order Reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
SPARE - A Scalable Algorithm for Passive, Structure Preserving, Parameter-Aware Model Order Reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
3POr - Parallel projection based parameterized order reduction for multi-dimensional linear models.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
HORUS - high-dimensional Model Order Reduction via low moment-matching upgraded sampling.
Proceedings of the Design, Automation and Test in Europe, 2010
2009
Proceedings of the Design, Automation and Test in Europe, 2009
ARMS - automatic residue-minimization based sampling for multi-point modeling techniques.
Proceedings of the 46th Design Automation Conference, 2009
2007
Proceedings of the VLSI-SoC: Advanced Topics on Systems on a Chip, 2007