José Manuel Cazeaux

According to our database, José Manuel Cazeaux authored at least 12 papers between 2004 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2014

Clock Faults Induced Min and Max Delay Violations.

Daniele Rossi, Martin Omaña, José Manuel Cazeaux, Cecilia Metra, T. M. Mak

J. Electron. Test., 2014

2009

Accurate Linear Model for SET Critical Charge Estimation.

Daniele Rossi, José Manuel Cazeaux, Martin Omaña, Cecilia Metra, Abhijit Chatterjee

IEEE Trans. Very Large Scale Integr. Syst., 2009

2006

Fault tolerant techniques for electronic systems implemented by nanometer technology.

José Manuel Cazeaux

PhD thesis, 2006

Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation.

Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak

Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

Can Clock Faults be Detected Through Functional Test?

Cecilia Metra, Daniele Rossi, Martin Omaña, José Manuel Cazeaux, T. M. Mak

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects.

Martin Omaña, José Manuel Cazeaux, Daniele Rossi, Cecilia Metra

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

Novel on-chip circuit for jitter testing in high-speed PLLs.

José Manuel Cazeaux, Martin Omaña, Cecilia Metra

IEEE Trans. Instrum. Meas., 2005

Self-Checking Voter for High Speed TMR Systems.

José Manuel Cazeaux, Daniele Rossi, Cecilia Metra

J. Electron. Test., 2005

On Transistor Level Gate Sizing for Increased Robustness to Transient Faults.

José Manuel Cazeaux, Daniele Rossi, Martin Omaña, Cecilia Metra, Abhijit Chatterjee

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

The Other Side of the Timing Equation: a Result of Clock Faults.

Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak

Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

2004

New High Speed CMOS Self-Checking Voter.

José Manuel Cazeaux, Daniele Rossi, Cecilia Metra

Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004

Low-Area On-Chip Circuit for Jitter Measurement in a Phase-Locked Loop.

José Manuel Cazeaux, Martin Omaña, Cecilia Metra

Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004