Josef Kinseher

Orcid: 0000-0001-6923-1059

According to our database1, Josef Kinseher authored at least 7 papers between 2013 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019
New Methods for Improving Embedded Memory Manufacturing Tests
PhD thesis, 2019

Improving Testability and Reliability of Advanced SRAM Architectures.
IEEE Trans. Emerg. Top. Comput., 2019

2017
Analyzing the effects of peripheral circuit aging of embedded SRAM architectures.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Failure mechanisms and test methods for the SRAM TVC write-assist technique.
Proceedings of the 21th IEEE European Test Symposium, 2016

Improving SRAM test quality by leveraging self-timed circuits.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
On the Use of Assist Circuits for Improved Coupling Fault Detection in SRAMs.
Proceedings of the 24th IEEE Asian Test Symposium, 2015

2013
Approximate simulation of circuits with probabilistic behavior.
Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013


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