Joseph Bulone

According to our database, Joseph Bulone authored at least 3 papers between 1994 and 1999.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1999

A single-chip CIF 30-Hz, H261, H263, and H263+ video encoder/decoder with embedded display controller.

Michel Harrand, Jose Sanches, Alain Bellon, Joseph Bulone, Alain Tournier, Olivier Deygas, Jean-Claude Herluison, David Doise, Elisabeth Berrebi

IEEE J. Solid State Circuits, 1999

1995

A 622/155 mbps ATM line terminator mono-chip.

Mario Diaz-Nava, Didier Belot, P. Delerue, Joseph Bulone

Proceedings of the 1995 European Design and Test Conference, 1995

1994

Généralisation des méthodes de scan pour le test des circuits intégrés complexes et application à des circuits critiques en vitesse. (Generalization of the scan methods for the test of complex integrated circuits and application to high speed circuits).

Joseph Bulone

PhD thesis, 1994