Mario Diaz-Nava

According to our database1, Mario Diaz-Nava authored at least 14 papers between 1986 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Deploying warehouse robots with confidence: the BRAIN-IoT framework's functional assurance.
J. Supercomput., January, 2024

2022
Big Wine Optimization Use Case: An IoT European Large Scale Pilot in Viticulture.
Proceedings of the Workshops at 18th International Conference on Intelligent Environments (IE2022), 2022

2020
Model Based Methodology and Framework for Design and Management of Next-Gen IoT Systems.
Proceedings of the 1st Eclipse Research International Conference on Security, Artificial Intelligence and Modeling for the next generation Internet of Things, Virtual Event, September 17th - to, 2020

End-to-end security validation of IoT systems based on digital twins of end-devices.
Proceedings of the 2020 Global Internet of Things Summit, 2020

2005
An Open Platform for Developing Multiprocessor SoCs.
Computer, 2005

2004
Multi-Processor SoC Design Methodology Using a Concept of Two-Layer Hardware-Dependent Software.
Proceedings of the 2004 Design, 2004

2003
High Level Modeling and Simulation of a VDSL Modem in SystemC 2.0 - IPsim.
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003

2002
Multiprocessor SoC Platforms: A Component-Based Design Approach.
IEEE Des. Test Comput., 2002

A short overview of the VDSL system requirements.
IEEE Commun. Mag., 2002

The Zipper prototype: a complete and flexible VDSL multicarrier solution.
IEEE Commun. Mag., 2002

Component-based design approach for multicore SoCs.
Proceedings of the 39th Design Automation Conference, 2002

1999
Comparing RTL and Behavioral Design Methodologies in the Case of a 2M-Transistor ATM Shaper.
Proceedings of the 36th Conference on Design Automation, 1999

1995
A 622/155 mbps ATM line terminator mono-chip.
Proceedings of the 1995 European Design and Test Conference, 1995

1986
Proposition d'une méthodologie de conception de circuits intégrés de communication : réalisation d'un communicateur pour le réseau local FIP. (Proposition of a methodology of communication integrated circuit design: implementation of a communication circuit for the FIP local net).
PhD thesis, 1986


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