# Joseph L. Ganley

According to our database

Collaborative distances:

^{1}, Joseph L. Ganley authored at least 25 papers between 1994 and 2008.Collaborative distances:

## Timeline

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#### On csauthors.net:

## Bibliography

2008

X Architecture Place and Route.

Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

2001

The pagenumber of k-trees is O(k).

Discret. Appl. Math., 2001

2000

A new heuristic for rectilinear Steiner trees.

IEEE Trans. on CAD of Integrated Circuits and Systems, 2000

1999

Provably good moat routing.

Integr., 1999

Computing Optimal Rectilinear Steiner Trees: A Survey and Experimental Evaluation.

Discret. Appl. Math., 1999

Efficient solution of systems of orientation constraints.

Proceedings of the 1999 International Symposium on Physical Design, 1999

1998

Placement and Routing for Performance-Oriented FPGA Layout.

VLSI Design, 1998

A Simple Approximation Algorithm for Two Problems in Circuit Design.

IEEE Trans. Computers, 1998

The Power-p Steiner Tree Problem.

Nord. J. Comput., 1998

An Experimental Evaluation of Local Search Heuristics for Graph Partitioning.

Computing, 1998

1997

Minimum-Congestion Hypergraph Embedding in a Cycle.

IEEE Trans. Computers, 1997

Accuracy and fidelity of fast net length estimates.

Integr., 1997

Improved Computation of Optimal Rectilinear Steiner Minimal Trees.

Int. J. Comput. Geometry Appl., 1997

1996

Rectilinear Steiner trees on a checkerboard.

ACM Trans. Design Autom. Electr. Syst., 1996

Optimal and approximate bottleneck Steiner trees.

Oper. Res. Lett., 1996

A Provably Good Moat Routing Algorithm.

Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

1995

Thumbnail rectilinear Steiner trees.

Proceedings of the 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), 1995

Performance-oriented placement and routing for field-programmable gate arrays.

Proceedings of the Proceedings EURO-DAC'95, 1995

The Multi-Weighted Spanning Tree Problem (Extended Abstract).

Proceedings of the Computing and Combinatorics, First Annual International Conference, 1995

1994

Heuristics for laying out information graphs.

Computing, 1994

Optimal and Random Partitions of Random Graphs.

Comput. J., 1994

Routing a Multi-Terminal Critical Net: Steiner Tree Construction in the Presence of Obstacles.

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A faster dynamic programming algorithm for exact rectilinear Steiner minimal trees.

Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994

An architecture-independent approach to FPGA routing based on multi-weighted graphs.

Proceedings of the Proceedings EURO-DAC'94, 1994

Optimal Rectilinear Steiner Minimal Trees in O (n

^{2}2.62^{n}) Time.
Proceedings of the 6th Canadian Conference on Computational Geometry, 1994