Juan Portillo

According to our database1, Juan Portillo authored at least 3 papers between 2013 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
Using Static Hardware Wrappers to Thwart Hardware Trojans and Code Bugs at Runtime.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2016
Building trust in 3PIP using asset-based security property verification.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016

2013
Variable latency VLSI design based on timing analysis, delay ATPG, and completion prediction.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013


  Loading...