Seetharam Narasimhan

According to our database1, Seetharam Narasimhan authored at least 33 papers between 2005 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

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Online presence:

On csauthors.net:

Bibliography

2017
Golden-Free Hardware Trojan Detection with High Sensitivity Under Process Noise.
J. Electron. Test., 2017

2016
Design and Validation for FPGA Trust under Hardware Trojan Attacks.
IEEE Trans. Multi Scale Comput. Syst., 2016

Building trust in 3PIP using asset-based security property verification.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016

2014
Hardware Trojan Attacks: Threat Analysis and Countermeasures.
Proc. IEEE, 2014

2013
Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis.
IEEE Trans. Computers, 2013

Role of power grid in side channel attack and power-grid-aware secure design.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
Ultralow-Power Implantable Electronics.
Proceedings of the Handbook of Energy-Aware and Green Computing - Two Volume Set., 2012

Healing of DSP Circuits Under Power Bound Using Post-Silicon Operand Bitwidth Truncation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Improving IC Security Against Trojan Attacks Through Integration of Security Monitors.
IEEE Des. Test Comput., 2012

Hardware IP Protection During Evaluation Using Embedded Sequential Trojan.
IEEE Des. Test Comput., 2012

SCARE: Side-Channel Analysis Based Reverse Engineering for Post-Silicon Validation.
Proceedings of the 25th International Conference on VLSI Design, 2012

Implantable ultrasonic dual functional assembly for detection and treatment of anomalous growth.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

Software exploitable hardware Trojans in embedded processor.
Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012

2011
Ultra-Low-Power and Robust Digital-Signal-Processing Hardware for Implantable Neural Interface Microsystems.
IEEE Trans. Biomed. Circuits Syst., 2011

VaROT: Methodology for Variation-Tolerant DSP Hardware Design Using Post-Silicon Truncation of Operand Width.
Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

NEMTronics: Symbiotic integration of nanoelectronic and nanomechanical devices for energy-efficient adaptive computing.
Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011

Embedded Software Security through Key-Based Control Flow Obfuscation.
Proceedings of the Security Aspects in Information Technology, 2011

Sequential hardware Trojan: Side-channel aware design and placement.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011

TeSR: A robust Temporal Self-Referencing approach for Hardware Trojan detection.
Proceedings of the HOST 2011, 2011

Low-power implantable ultrasound imager for online monitoring of tumor growth.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011

High-temperature (>500°C) reconfigurable computing using silicon carbide NEMS switches.
Proceedings of the Design, Automation and Test in Europe, 2011

MECCA: A Robust Low-Overhead PUF Using Embedded Memory Array.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2011 - 13th International Workshop, Nara, Japan, September 28, 2011

2010
Multiple-Parameter Side-Channel Analysis: A Non-invasive Hardware Trojan Detection Approach.
Proceedings of the HOST 2010, 2010

A supply-demand model based scalable energy management system for improved energy utilization efficiency.
Proceedings of the International Green Computing Conference 2010, 2010

Self-referencing: A Scalable Side-Channel Approach for Hardware Trojan Detection.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2010

System level self-healing for parametric yield and reliability improvement under power bound.
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010

2009
Hardware Trojan: Threats and emerging solutions.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2009

2008
On-die CMOS voltage droop detection and dynamiccompensation.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

Collective computing based on swarm intelligence.
Proceedings of the 45th Design Automation Conference, 2008

2007
Hybridization of CMOS With CNT-Based Nano-Electromechanical Switch for Low Leakage and Robust Circuit Design.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Biological Data Mining for Genomic Clustering Using Unsupervised Neural Learning.
Eng. Lett., 2007

2005
A Novel Algorithm for Automatic Species Identification Using Principal Component Analysis.
Proceedings of the Pattern Recognition and Machine Intelligence, 2005

Application of Neural Networks to Biological Data Mining for Automatic Species Identification.
Proceedings of the 2nd Indian International Conference on Artificial Intelligence, 2005


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