Jue-Hsuan Hsiao

According to our database, Jue-Hsuan Hsiao authored at least 5 papers between 1993 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2014

Wi-Fi LDPC encoder with approximate lower triangular diverse implementation and verification.

Yi Hua Chen, Jue-Hsuan Hsiao, Zong Yi Siao

Proceedings of the IEEE 11th International Multi-Conference on Systems, Signals & Devices, 2014

1997

A bit-level pipelined VLSI architecture for the running order algorithm.

Chun-Te Chen, Liang-Gee Chen, Jue-Hsuan Hsiao

IEEE Trans. Signal Process., 1997

1995

High throughput CORDIC-based systolic array design for the discrete cosine transform.

Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen

IEEE Trans. Circuits Syst. Video Technol., 1995

A hardware-oriented design for weighted median filters.

Chun-Te Chen, Liang-Gee Chen, Jue-Hsuan Hsiao

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1993

Novel Systolic Array Design for the Discrete Hartley Transform with High Throughput Rate.

Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993