Jun Xu
Affiliations:- Fudan University, The State Key Lab of ASIC & System, China
According to our database1,
Jun Xu
authored at least 12 papers
between 2007 and 2015.
Collaborative distances:
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Timeline
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Bibliography
2015
IEEE Trans. Circuits Syst. II Express Briefs, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
A 20MHz BW 35fJ/conv. continuous-time ΣΔ modulator with single-opamp resonator using finite GBW compensation method.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
2014
A low-offset calibration-free comparator with a mismatch-suppressed dynamic preamplifier.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Beyond-one-cycle loop delay CT ΔΣ modulators with proper rational NTF synthesis and time-interleaved quantizers.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
A 80-dB DR, 10-MHz BW continuous-time sigma-delta modulator with low power comparators and switch drivers.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
A finite gain bandwidth compensation method for low power continuous-time ΣΔ modulator.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
2010
A 0.22 pJ/step subsampling ADC with fast input-tracking sampling and simplified opamp sharing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007