Jung-Cheng Yeh

According to our database, Jung-Cheng Yeh authored at least 2 papers between 2004 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2007

A 2GHz, 7W (max) 64b Power^TM Microprocessor Core.

Daniel Murray, James Burnette, Brian Campbell, Mark Chung, Bruce Fernandes, Subhendra Ghosh, Rajat Goel, Greg Hess, Hang Huang, Zhibin Huang, Naveen Javarappa, Pradeep Kanapathipillai, Fabian Klass, Fang Liu, Anup Mehta, Yamini Modukuru, Nishant Nerurkar, Abhijit Radhakrishnan, Sribalan Santhanam, Junji Sugisawa, Shyam Sundar, Honkai John Tam, Ricky Wen, Eric Wu, Jung-Cheng Yeh, John Yong, Sanjay Zambare

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2004

Design and implementation of an embedded 512KB level 2 cache subsystem.

Jinuk Luke Shin, Bruce Petrick, Howard Levy, Jinseung Son, Mandeep Singh, Vikas Mathur, Jung-Cheng Yeh, Heesung Choi, Vishal Gupta, Tom Ziaja, Ana Sonia Leon

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004