Jung-Yu Chang

According to our database, Jung-Yu Chang authored at least 6 papers between 2006 and 2010.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2010

A Phase-Locked Loop With Background Leakage Current Compensation.

Jung-Yu Chang, Shen-Iuan Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2010

2009

A Single-PLL UWB Frequency Synthesizer Using Multiphase Coupled Ring Oscillator and Current-Reused Multiplier.

Jung-Yu Chang, Che-Wei Fan, Che-Fu Liang, Shen-Iuan Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2009

A 1.5 GHz phase-locked loop with leakage current suppression in 65 nm CMOS.

Jung-Yu Chang, Shen-Iuan Liu

IET Circuits Devices Syst., 2009

2007

A DLL-Based Variable-Phase Clock Buffer.

Chao-Chyun Chen, Jung-Yu Chang, Shen-Iuan Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2007

2006

A spur-reduction technique for a 5-GHz frequency synthesizer.

Chun-Yi Kuo, Jung-Yu Chang, Shen-Iuan Liu

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

A 0.7-2-GHz self-calibrated multiphase delay-locked loop.

Hsiang-Hui Chang, Jung-Yu Chang, Chun-Yi Kuo, Shen-Iuan Liu

IEEE J. Solid State Circuits, 2006