Chao-Chyun Chen

According to our database1, Chao-Chyun Chen authored at least 9 papers between 2007 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2020
Correction to: the Video Spatial Error Concealment Algorithm Using Separately-Directional Interpolation Technique.
J. Signal Process. Syst., 2020

2017
The Video Spatial Error Concealment Algorithm Using Separately-Directional Interpolation Technique.
J. Signal Process. Syst., 2017

2016
A Fast-Transient Wide-Voltage-Range Digital-Controlled Buck Converter With Cycle-Controlled DPWM.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2014
Design of VLSI Architecture of Autocorrelation-Based Lossless Recompression Engine for Memory-Efficient Video Coding Systems.
Circuits Syst. Signal Process., 2014

A modified multi-fingers stru cture for power transistor in 0.16μm CMOS process.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2014

A wide-range and fast-locking frequency synthesizer for Wimax and WLAN applications.
Proceedings of the IEEE 3rd Global Conference on Consumer Electronics, 2014

2012
A wide-range all-digital delay-locked loop using fast-lock variable SAR algorithm.
Proceedings of the International Symposium on Intelligent Signal Processing and Communications Systems, 2012

2008
An Infinite Phase Shift Delay-Locked Loop With Voltage-Controlled Sawtooth Delay Line.
IEEE J. Solid State Circuits, 2008

2007
A DLL-Based Variable-Phase Clock Buffer.
IEEE Trans. Circuits Syst. II Express Briefs, 2007


  Loading...