Jungyun Choi

According to our database, Jungyun Choi authored at least 7 papers between 2019 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Accelerating design-technology co-development using neural compact modeling and data-driven SPICE simulation.

Yongjeong Lee, Seungsoo Lee, Jeongyeol Kim, Jungyun Choi, Zhaojie Li, Dehuang Wu, Joddy Wang

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024

An Adaptive Zone-Grouping Scheme Enabling General-Purpose File Systems on ZNS SSDs.

Jungyun Choi, Yuhun Jun, Jongseok Kim, Jinkyu Jeong, Euiseong Seo

Proceedings of the 17th ACM International Systems and Storage Conference, 2024

2022

Hardware Performance Monitoring Methodology at Near-Threshold Computing and Advanced Technology Nodes: From Design to Postsilicon.

Jeongwoo Heo, Kwangok Jeong, Jungyun Choi, Taewhan Kim, Kyumyung Choi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021

Early HW/SW Co-Verification Using Virtual Platforms.

Jungyun Choi, Kyungsu Kang, Byunghoon Lee, Sangho Park, Jae-Woo Im

Proceedings of the 18th International SoC Design Conference, 2021

2020

SRAM on-chip monitoring methodology for high yield and energy efficient memory operation at near threshold voltage.

Taehwan Kim, Kwangok Jeong, Jungyun Choi, Taewhan Kim, Kyu-Myung Choi

Integr., 2020

On-chip Interconnect Optimization and Validation using Virtual Platform.

Jungyun Choi, Kyungsu Kang, Sangho Park, Seunghan Lee, YoHan Park, Byeongwook Bae, Byunghoon Lee, ByungChul Yoo

Proceedings of the International SoC Design Conference, 2020

2019

Seamless SoC Verification Using Virtual Platforms: An Industrial Case Study.

Kyungsu Kang, Sangho Park, Byeongwook Bae, Jungyun Choi, SungGil Lee, Byunghoon Lee, Jong-Bae Lee

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019