Kai Yu

Orcid: 0000-0002-0938-2987

Affiliations:
  • Guangdong University of Technology, School of Information Engineering, School of Integrated Circuits, China
  • Huazhong University of Science and Technology, Department of Electronic Science and Technology, Wuhan, China


According to our database1, Kai Yu authored at least 17 papers between 2008 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
A high slew-rate OTA with hybrid dynamic current boosting technique.
IEICE Electron. Express, 2026

2025
Design of Scalable Hybrid Boost Converter With Optimal Number of Stages for High Conversion Ratio and High Power Efficiency.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2025

Design of Enhanced Three-Level Buck Converter With Configurable Power and Control Stages for Fast Load Transient Response.
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2025

A 140 pW, -77 dB PSRR, PMOS-Only Voltage Reference Using Pre-Regulation Technique With Gate and Bulk Feedback.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2025

2024
A 521pW, 0.016%/V Line Sensitivity Self-Biased CMOS Voltage Reference With DIBL Effect Compensation Using Adaptive V<sub>GS</sub> Control.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

A 0.011%/V LS and -76-dB PSRR Self-Biased CMOS Voltage Reference With Quasi Self-Cascode Current Mirror.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

Design of 300nA quiescent current and 300mA load capacity LDO with fast transient response.
IEICE Electron. Express, 2024

2022
A 23-pW NMOS-Only Voltage Reference With Optimum Body Selection for Process Compensation.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

2020
A compact hybrid envelope tracking supply modulator with wide-band high-slew-rate linear amplifier.
IEICE Electron. Express, 2020

2018
A 0.1 to 2.7-GHz SOI SP8T antenna switch adopting body self-adapting bias technique for low-loss high-power applications.
Int. J. Circuit Theory Appl., 2018

2017
Design Considerations of Charge Pump for Antenna Switch Controller With SOI CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

2016
Digital Sensorless Current Mode Control Based on Charge Balance Principle and Dual Current Error Compensation for DC-DC Converters in DCM.
IEEE Trans. Ind. Electron., 2016

Dual SPDT/SP3T SOI CMOS switch adopting alternative bias strategy with enhanced performance compared to the conventional case.
IEICE Electron. Express, 2016

2008
Dynamic current limitation circuit for white LED driver.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

Clock control strategy of four-phase Dickson charge pump for power efficiency improvement.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

A 90nm CMOS wide-band voltage-controlled ring oscillator for digital TV-tuner.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

A precise bandgap reference with intrinsic compensation for current-mirror mismatch.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008


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