Kai Yu
Orcid: 0000-0002-0938-2987Affiliations:
- Guangdong University of Technology, School of Information Engineering, School of Integrated Circuits, China
- Huazhong University of Science and Technology, Department of Electronic Science and Technology, Wuhan, China
According to our database1,
Kai Yu
authored at least 10 papers
between 2008 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
A 521pW, 0.016%/V Line Sensitivity Self-Biased CMOS Voltage Reference With DIBL Effect Compensation Using Adaptive V<sub>GS</sub> Control.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024
A 0.011%/V LS and -76-dB PSRR Self-Biased CMOS Voltage Reference With Quasi Self-Cascode Current Mirror.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
2022
A 23-pW NMOS-Only Voltage Reference With Optimum Body Selection for Process Compensation.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
2020
A compact hybrid envelope tracking supply modulator with wide-band high-slew-rate linear amplifier.
IEICE Electron. Express, 2020
2018
A 0.1 to 2.7-GHz SOI SP8T antenna switch adopting body self-adapting bias technique for low-loss high-power applications.
Int. J. Circuit Theory Appl., 2018
2017
Design Considerations of Charge Pump for Antenna Switch Controller With SOI CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
2016
Dual SPDT/SP3T SOI CMOS switch adopting alternative bias strategy with enhanced performance compared to the conventional case.
IEICE Electron. Express, 2016
2008
Clock control strategy of four-phase Dickson charge pump for power efficiency improvement.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008