Kapil Jainwal

Orcid: 0000-0002-2337-6321

According to our database1, Kapil Jainwal authored at least 9 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Tau-Cell-Based Analog Silicon Retina With Spatio- Temporal Filtering and Contrast Gain Control.
IEEE Trans. Biomed. Circuits Syst., April, 2024

Design and Implementation of SPAD-Based Linearly Stable Multi-Mode Configurable TAC Pixel.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023
A Novel Active Pixel Sensor Architecture with In-Pixel Chopping and Switched Biasing to Reduce the Low-Frequency Noise.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 15-nW 14-ppm/°C 1.18 V startup-less bandgap-based voltage regulator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A SPAD Based dToF Pixel with Log/Linear Multi-mode Operation for LiDAR Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2019
A Three-Phase, One-Tap High Background Light Subtraction Time-of-Flight Camera.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2016
Design of a hybrid ring oscillator at 1.5/3.0 GHz with low power supply sensitivity.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

A high background light subtraction circuit for long range time-of-flight cameras.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2012
Process variation tolerant 9T SRAM bitcell design.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012


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