Chetan Singh Thakur

Orcid: 0000-0002-1240-6214

According to our database1, Chetan Singh Thakur authored at least 79 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Tau-Cell-Based Analog Silicon Retina With Spatio- Temporal Filtering and Contrast Gain Control.
IEEE Trans. Biomed. Circuits Syst., April, 2024

Editorial: Focus on Neuromorphic Circuits and Systems using Emerging Devices.
Neuromorph. Comput. Eng., March, 2024

EventMASK: A Frame-Free Rapid Human Instance Segmentation With Event Camera Through Constrained Mask Propagation.
IEEE Robotics Autom. Lett., 2024

EventF2S: Asynchronous and Sparse Spiking AER Framework using Neuromorphic-Friendly Algorithm.
CoRR, 2024

Margin Propagation based XOR-SAT Solvers for Decoding of LDPC Codes.
CoRR, 2024

Margin Propagation based Analog Soft-Gates for Probabilistic Computing.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

Multiplierless In-filter Computing for tinyML Platforms.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023
Neuromorphic Computing With Address-Event-Representation Using Time-to-Event Margin Propagation.
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2023

tinyRadar for Fitness: A Contactless Framework for Edge Computing.
IEEE Trans. Biomed. Circuits Syst., April, 2023

Bias-Scalable Near-Memory CMOS Analog Processor for Machine Learning.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

Process, Bias, and Temperature Scalable CMOS Analog Computing Circuits for Machine Learning.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2023

SQ-CARS: A Scalable Quantum Control and Readout System.
IEEE Trans. Instrum. Meas., 2023

RAMAN: A Re-configurable and Sparse tinyML Accelerator for Inference on Edge.
CoRR, 2023

Neuromorphic Computing with AER using Time-to-Event-Margin Propagation.
CoRR, 2023

A Sparsity-driven tinyML Accelerator for Decoding Hand Kinematics in Brain-Computer Interfaces.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

Live Demonstration: Audio Inference using Neuromorphic Cochlea on RAMAN Accelerator.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

2022
Multiplierless MP-Kernel Machine for Energy-Efficient Edge Devices.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Neuromorphic Time-Multiplexed Reservoir Computing With On-the-Fly Weight Generation for Edge Devices.
IEEE Trans. Neural Networks Learn. Syst., 2022

Event-LSTM: An Unsupervised and Asynchronous Learning-Based Representation for Event-Based Data.
IEEE Robotics Autom. Lett., 2022

In-Filter Computing for Designing Ultralight Acoustic Pattern Recognizers.
IEEE Internet Things J., 2022

Theroretical Insight into Batch Normalization: Data Dependant Auto-Tuning of Regularization Rate.
CoRR, 2022

Theory and Implementation of Process and Temperature Scalable Shape-based CMOS Analog Circuits.
CoRR, 2022

CMOS Circuits for Shape-Based Analog Machine Learning.
CoRR, 2022

tinyRadar: mmWave Radar based Human Activity Classification for Edge Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

An Always-On tinyML Acoustic Classifier for Ecological Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
A Neuromorphic Proto-Object Based Dynamic Visual Saliency Model With a Hybrid FPGA Implementation.
IEEE Trans. Biomed. Circuits Syst., 2021

Biomimetic FPGA-based spatial navigation model with grid cells and place cells.
Neural Networks, 2021

In-filter Computing For Designing Ultra-light Acoustic Pattern Recognizers.
CoRR, 2021

FPGA Implementation of Particle Filters for Robotic Source Localization.
IEEE Access, 2021

Bayesian Source Localization Using Stochastic Computation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Real-Time Object Detection and Localization in Compressive Sensed Video.
Proceedings of the 2021 IEEE International Conference on Image Processing, 2021

2020
A Closed-Loop, All-Electronic Pixel-Wise Adaptive Imaging System for High Dynamic Range Videography.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Neuromorphic Fringe Projection Profilometry.
IEEE Signal Process. Lett., 2020

Source localization using particle filtering on FPGA for robotic navigation with imprecise binary measurement.
CoRR, 2020

A Proto-Object Based Dynamic Visual Saliency Model with an FPGA Implementation.
CoRR, 2020

QUICKSAL: A small and sparse visual saliency model for efficient inference in resource constrained hardware.
Proceedings of the IEEE Winter Conference on Applications of Computer Vision, 2020

FPGA based Compressive Sensing Framework for Video Compression on Edge Devices.
Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

Implementation of Bayesian Fly Tracking Model using Analog Neuromorphic Circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Miniature Wireless Silicon-on-Insulator Image Sensor for Brain Fluorescence Imaging.
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020

2019
Neuromorphic vision: From sensors to event-based algorithms.
WIREs Data Mining Knowl. Discov., 2019

Real-Time Object Detection and Localization in Compressive Sensed Video on Embedded Hardware.
CoRR, 2019

EvAn: Neuromorphic Event-based Anomaly Detection.
CoRR, 2019

Multiplierless and Sparse Machine Learning based on Margin Propagation Networks.
CoRR, 2019

A closed-loop all-electronic pixel-wise adaptive imaging system for high dynamic range video.
CoRR, 2019

A Compressive Sensing Video dataset using Pixel-wise coded exposure.
CoRR, 2019

A high-performance MoS2 synaptic device with floating gate engineering for Neuromorphic Computing.
CoRR, 2019

ASIC Based LVDT Signal Conditioner for High-Accuracy Measurements.
Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

Neuromorphic In-Memory Computing Framework using Memtransistor Cross-bar based Support Vector Machines.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Analog Neuromorphic System Based on Multi Input Floating Gate MOS Neuron Model.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Real-Time Image Segmentation using Neuromorphic Pixel Array.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

N-HAR: A Neuromorphic Event-Based Human Activity Recognition System using Memory Surfaces.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Live Demonstration: Real-Time Implementation of Proto-Object Based Visual Saliency Model.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Low Power Neuromorphic Analog System Based on Sub-Threshold Current Mode Circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

SAMIR: Sparsity Amplified Iteratively-reweighted Beamforming for High-rsolution Ultrasound Imaging.
Proceedings of the IEEE International Conference on Acoustics, 2019

A Portable Ultrasound Imaging System Utilizing Deep Generative Learning-Based Compressive Sensing On Pre-Beamformed RF Signals.
Proceedings of the 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2019

2018
An Analogue Neuromorphic Co-Processor That Utilizes Device Mismatch for Learning Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Large-Scale Neuromorphic Spiking Array Processors: A quest to mimic the brain.
CoRR, 2018

An FPGA-based Massively Parallel Neuromorphic Cortex Simulator.
CoRR, 2018

Neuromorphic Object Tracking Architecture, Based on Compound Eyes, and Implementation on FPGA.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2017
Neuromorphic Hardware Architecture Using the Neural Engineering Framework for Pattern Recognition.
IEEE Trans. Biomed. Circuits Syst., 2017

Spatiotemporal compressed sensing for video compression.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Live demonstration: A compact all-CMOS spatiotemporal compressed sensing video camera.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Neuromorphic visual saliency implementation using stochastic computation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Low-power, low-mismatch, highly-dense array of VLSI Mihalas-Niebur neurons.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Inference in spiking Bayesian neurons using stochastic computation.
Proceedings of the 51st Annual Conference on Information Sciences and Systems, 2017

Real-time image segmentation using a spiking neuromorphic processor.
Proceedings of the 51st Annual Conference on Information Sciences and Systems, 2017

2016
A Low Power Trainable Neuromorphic Integrated Circuit That Is Tolerant to Device Mismatch.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

A stochastic approach to STDP.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Electronic cochlea: CAR-FAC model on FPGA.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

An SRAM-based implementation of a convolutional neural network.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

2015
Turn Down That Noise: Synaptic Encoding of Afferent SNR in a Single Spiking Neuron.
IEEE Trans. Biomed. Circuits Syst., 2015

A neuromorphic hardware architecture using the Neural Engineering Framework for pattern recognition.
CoRR, 2015

A Trainable Neuromorphic Integrated Circuit that Exploits Device Mismatch.
CoRR, 2015

An Online Learning Algorithm for Neuromorphic Hardware Implementation.
CoRR, 2015

A neuromorphic hardware framework based on population coding.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

A reconfigurable mixed-signal implementation of a neuromorphic ADC.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

A compact aVLSI conductance-based silicon neuron.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

2014
Live demonstration: FPGA implementation of the CAR model of the cochlea.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

FPGA implementation of the CAR Model of the cochlea.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014


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