Karthik G. Jayaraman
According to our database1,
Karthik G. Jayaraman
authored at least 3 papers
between 2013 and 2016.
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Bibliography
2016
A 0.6-V power efficient digital LDO with 99.7% current efficiency utilizing load current aware clock modulation for fast transient response.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Design and array implementation a cantilever-based non-volatile memory utilizing vibrational reset.
Proceedings of the European Solid-State Device Research Conference, 2013