Kiat Seng Yeo
Orcid: 0000-0002-4524-707X
According to our database1,
Kiat Seng Yeo
authored at least 153 papers
between 1998 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2016, "For contributions to low-power integrated circuit design".
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on orcid.org
On csauthors.net:
Bibliography
2024
A 211.4-to-234.8 GHz 25.6-dB Differential Amplifier With Compact Terminal Multi-Coupled and Auxiliary Interstage-Coupled Matching Networks.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
2023
A Linear-in-Decibel Automatic Gain Control Amplifier With Dual Mode Continuous Gain Tuning.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023
IEEE Access, 2023
Concurrent Multiband CMOS Low Noise Amplifier Design for Internet of Things Applications.
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2021
Decentralized and Lightweight Approach to Detect Eclipse Attacks on Proof of Work Blockchains.
IEEE Trans. Netw. Serv. Manag., 2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
A digital background calibration scheme for non-linearity of SAR ADC using back-propagation algorithm.
Microelectron. J., 2021
A Monolithically Integrated Single-Input Load-Modulated Balanced Amplifier With Enhanced Efficiency at Power Back-Off.
IEEE J. Solid State Circuits, 2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2020
Design of a Wideband Variable-Gain Amplifier With Self-Compensated Transistor for Accurate dB-Linear Characteristic in 65 nm CMOS Technology.
IEEE Trans. Circuits Syst., 2020
Microelectron. J., 2020
An Ultra-Low Power 900 MHz Intermediate Frequency Low Noise Amplifier For Low-Power RF Receivers.
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020
2019
A Reliability-Oriented Startup Analysis of Injection-Locked Frequency Divider Based on Broken Symmetry Theory.
IEEE Trans. Very Large Scale Integr. Syst., 2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A Multi-Mode Multi-Coil Coupled Tuned Inductive Peaking ILFD for Low Injected Power With Compact Size.
IEEE Access, 2019
Millimeter-wave Sine Corrugated Fermi Tapered Slot Antenna Array Based on Partial Synthesized Dielectric.
Proceedings of the IEEE Radio and Wireless Symposium, 2019
A K-Band Differential SiGe Stacked Power Amplifier Based on Capacitive Compensation Techniques for Gain Enhancements.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
An Inductorless 6-GHz Variable Gain Differential Transimpedance Amplifier in 0.18-μm SiGe BiCMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
An Inductorless 5-GHz Differential Dual Regulated Cross-Cascode Transimpedance Amplifier using 40 nm CMOS.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
2018
Design and optimization of the ring oscillator based injection locked frequency dividers.
Microelectron. J., 2018
A 2.4 mW 2.5 GHz multi-phase clock generator with duty cycle imbalance correction in 0.13 µm CMOS.
Integr., 2018
Proceedings of the TENCON 2018, 2018
Proceedings of the TENCON 2018, 2018
Proceedings of the TENCON 2018, 2018
Proceedings of the TENCON 2018, 2018
2017
The Investigation and Optimisation of Phase-Induced Amplitude Attenuation in the Injection-Locked Ring Oscillators-Based Receiver.
Circuits Syst. Signal Process., 2017
Micro-LED arrays for display and communication: Device structure and driver architecture.
Proceedings of the 12th IEEE International Conference on ASIC, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Circuits Syst. Signal Process., 2016
Millimetre-wave performance of passive microstrip bandpass filters based on 40nm CMOS technology.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
Design of millimeter-wave transformer balun with isolation circuit in silicon based technology.
Proceedings of the International Symposium on Integrated Circuits, 2016
Proceedings of the International Symposium on Integrated Circuits, 2016
A wideband digital variable gain amplifier with DC offset cancellation in SiGe 0.18µm BiCMOS technology.
Proceedings of the International Symposium on Integrated Circuits, 2016
Proceedings of the International Symposium on Integrated Circuits, 2016
An inductorless transimpedance amplifier design for 10 Gb/s optical communication using 0.18-µm CMOS.
Proceedings of the International Symposium on Integrated Circuits, 2016
2015
A Low Phase Noise and Wide Tuning Range Millimeter-Wave VCO Using Switchable Coupled VCO-Cores.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
A 65 nm CMOS Power Amplifier With Peak PAE above 18.9% From 57 to 66 GHz Using Synthesized Transformer-Based Matching Network.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
2.5 A 2-to-6GHz Class-AB power amplifier with 28.4% PAE in 65nm CMOS supporting 256QAM.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2.3 A 130-to-180GHz 0.0035mm<sup>2</sup> SPDT switch with 3.3dB loss and 23.7dB isolation in 65nm bulk CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
A 32kb 9T SRAM with PVT-tracking read margin enhancement for ultra-low voltage operation.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
2014
Analysis and Design of Ultra-Wideband Low-Noise Amplifier With Input/Output Bandwidth Optimization and Single-Ended/Differential-Input Reconfigurability.
IEEE Trans. Ind. Electron., 2014
Design and Analysis of Wide Frequency-Tuning-Range CMOS 60 GHz VCO by Switching Inductor Loaded Transformer.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
0.77 fJ/bit/search Content Addressable Memory Using Small Match Line Swing and Automated Background Checking Scheme for Variation Tolerance.
IEEE J. Solid State Circuits, 2014
Design and Analysis of a 2.4 GHz Hybrid Type Automatic amplitude Control VCO with Forward noise Reduction.
J. Circuits Syst. Comput., 2014
A 64×64 1200fps CMOS ion-image sensor with suppressed fixed-pattern-noise for accurate high-throughput DNA sequencing.
Proceedings of the Symposium on VLSI Circuits, 2014
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
A hybrid NEO-based spike detection algorithm for implantable brain-IC interface applications.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
Cross-Coupled Current Conveyor Based CMOS Transimpedance Amplifier for Broadband Data Transmission.
IEEE Trans. Very Large Scale Integr. Syst., 2013
IEEE Trans. Circuits Syst. II Express Briefs, 2013
A Dividerless PLL With Low Power and Low Reference Spur by Aperture-Phase Detector and Phase-to-Analog Converter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
J. Circuits Syst. Comput., 2013
J. Circuits Syst. Comput., 2013
A 12-mW 40-60-GHz 0.18- $\mu {\hbox {m}}$ BiCMOS Oscillator-Less Self-Demodulator for Short-Range Software-Defined Transceivers.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2013
A low power wideband differential transimpedance amplifier for optical receivers in 0.18-μm CMOS.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013
Optical infrastructure for visible light communication for public housing and commercial buildings.
Proceedings of the 2013 IEEE Symposium on Computers and Communications, 2013
MIMO-diversity switching techniques for digital transmission in visible light communication.
Proceedings of the 2013 IEEE Symposium on Computers and Communications, 2013
A current-mode stimulator circuit with two-step charge balancing background calibration.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Design and array implementation a cantilever-based non-volatile memory utilizing vibrational reset.
Proceedings of the European Solid-State Device Research Conference, 2013
Design of a power-efficient CAM using automated background checking scheme for small match line swing.
Proceedings of the ESSCIRC 2013, 2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
Design Exploration of Hybrid CMOS and Memristor Circuit by New Modified Nodal Analysis.
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
A Dual-Loop Clock and Data Recovery Circuit With Compact Quarter-Rate CMOS Linear Phase Detector.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
Sensing Margin Enhancement Techniques for Ultra-Low-Voltage SRAMs Utilizing a Bitline-Boosting Current and Equalized Bitline Leakage.
IEEE Trans. Circuits Syst. II Express Briefs, 2012
J. Circuits Syst. Comput., 2012
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Proceedings of the International SoC Design Conference, 2012
Proceedings of the International SoC Design Conference, 2012
An optimum RF link for implantable devices with rectification of transmission errors.
Proceedings of the International SoC Design Conference, 2012
Designs of a free-space white-LED mass-storage transceiver for SD-card file transfer.
Proceedings of the Workshops Proceedings of the Global Communications Conference, 2012
High-speed CMOS image sensor for high-throughput lensless microfluidic imaging system.
Proceedings of the Sensors, 2012
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
On-chip tunable low pass filter with improved stopband using new cross coupled topology.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
A 9.87 nW 1 kS/s 8.7 ENOB SAR ADC for implantable epileptic seizure detection microsystems.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
A 12-GHz high output power amplifier using 0.18µm SiGe BiCMOS for low power applications.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
Design and Sensitivity Analysis of a New Current-Mode Sense Amplifier for Low-Power SRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2011
A Low-Loss Image-Reject Mixer Using Source Follower Isolation Method for DRM/DAB Tuner Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2011
An 8T Differential SRAM With Improved Noise Margin for Bit-Interleaving in 65 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011
Ultra low-power high-speed flexible Probabilistic Adder for Error-Tolerant Applications.
Proceedings of the International SoC Design Conference, 2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the International SoC Design Conference, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
A comparative study of state-of-the-art low-power CAM match-line sense amplifier designs.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011
A 2.1-GHz PLL with -80dBc/-74dBc reference spur based on aperture-phase detector and phase-to-analog converter.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011
2010
Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing.
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
A 1.8-V 3.6-mW 2.4-GHz fully integrated CMOS frequency synthesizer for IEEE 802.15.4.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010
A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4.
Proceedings of the VLSI-SoC: Forward-Looking Trends in IC and Systems Design, 2010
A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole.
Proceedings of the VLSI-SoC: Forward-Looking Trends in IC and Systems Design, 2010
A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010
Low power millimeter wave active sige sub-harmonic up-conversion mixer with ultra low driving power.
Proceedings of the 17th IEEE International Conference on Electronics, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
Low IR drop and low power parallel CAM design using gated power transistor technique.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
IEEE Trans. Circuits Syst. II Express Briefs, 2008
J. Circuits Syst. Comput., 2008
Spicesoft: Automated Tool for Sensitivity Analysis, Performance Analysis, and Inverse Performance Analysis of Digital Circuits.
J. Circuits Syst. Comput., 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
Microelectron. J., 2007
2006
A novel CMOS low-noise amplifier design for 3.1- to 10.6-GHz ultra-wide-band wireless receivers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
J. Circuits Syst. Comput., 2006
Proceedings of the IFIP VLSI-SoC 2006, 2006
Proceedings of the VLSI-SoC: Research Trends in VLSI and Systems on Chip, 2006
Proceedings of the IFIP VLSI-SoC 2006, 2006
2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
IEEE Trans. Circuits Syst. II Express Briefs, 2005
Fully integrated CMOS fractional-N frequency divider for wide-band mobile applications with spurs reduction.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
J. Circuits Syst. Comput., 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
A low-power static dual edge-triggered flip-flop using an output-controlled discharge configuration.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
IEEE Trans. Circuits Syst. II Express Briefs, 2004
Investigating the frequency dependence elements of CMOS RFIC interconnects for physical modeling.
Proceedings of the Sixth International Workshop on System-Level Interconnect Prediction (SLIP 2004), 2004
2003
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
1999
IEEE J. Solid State Circuits, 1999
1998
IEEE J. Solid State Circuits, 1998