Kasyab P. Subramaniyan

According to our database1, Kasyab P. Subramaniyan authored at least 6 papers between 2009 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2013
Manufacturable nanometer designs using standard cells with regular layout.
Proceedings of the International Symposium on Quality Electronic Design, 2013

2011
Application-Specific Energy Optimization of General-Purpose Datapath Interconnect.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

2010
Generation and Exploration of Layouts for Area-Efficient Barrel Shifters.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

Design space exploration for an embedded processor with flexible datapath interconnect.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

2009
Layout exploration of geometrically accurate arithmetic circuits.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

Custom layout strategy for rectangle-shaped log-depth multiplier reduction tree.
Proceedings of the 16th IEEE International Conference on Electronics, 2009


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