Kasyab P. Subramaniyan

According to our database, Kasyab P. Subramaniyan authored at least 6 papers between 2009 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

Manufacturable nanometer designs using standard cells with regular layout.

Kasyab P. Subramaniyan, Per Larsson-Edefors

Proceedings of the International Symposium on Quality Electronic Design, 2013

2011

Application-Specific Energy Optimization of General-Purpose Datapath Interconnect.

Babak Hidaji, Salar Alipour, Kasyab P. Subramaniyan, Per Larsson-Edefors

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

2010

Generation and Exploration of Layouts for Area-Efficient Barrel Shifters.

Alen Bardizbanyan, Kasyab P. Subramaniyan, Per Larsson-Edefors

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

Design space exploration for an embedded processor with flexible datapath interconnect.

Tung Thanh Hoang, Ulf Jalmbrant, Erik der Hagopian, Kasyab P. Subramaniyan, Magnus Själander, Per Larsson-Edefors

Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

2009

Layout exploration of geometrically accurate arithmetic circuits.

Kasyab P. Subramaniyan, Emil Axelsson, Per Larsson-Edefors, Mary Sheeran

Proceedings of the 16th IEEE International Conference on Electronics, 2009

Custom layout strategy for rectangle-shaped log-depth multiplier reduction tree.

Patrik Kimfors, Niklas Broman, Andreas Haraldsson, Kasyab P. Subramaniyan, Magnus Själander, Henrik Eriksson, Per Larsson-Edefors

Proceedings of the 16th IEEE International Conference on Electronics, 2009