Tung Thanh Hoang

According to our database, Tung Thanh Hoang authored at least 14 papers between 2009 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Effect of OTS Selector Reliabilities on NVM Crossbar-based Neuromorphic Training.

Wen Ma, Tung Thanh Hoang, Brian Hoskins, Matthew W. Daniels, Jabez J. McClelland, Yutong Gao, Gina C. Adam, Martin Lueker-Boden

Proceedings of the IEEE International Reliability Physics Symposium, 2022

2020

An In-Flash Binary Neural Network Accelerator with SLC NAND Flash Array.

Won Ho Choi, Pi-Feng Chiu, Wen Ma, Gertjan Hemink, Tung Thanh Hoang, Martin Lueker-Boden, Zvonimir Bandic

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2016

A Data Layout Transformation (DLT) accelerator: Architectural support for data movement optimization in accelerated-centric heterogeneous systems.

Tung Thanh Hoang, Amirali Shambayati, Andrew A. Chien

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

10x10: A Case Study in Highly-Programmable and Energy-Efficient Heterogeneous Federated Architecture.

Andrew A. Chien, Tung Thanh Hoang, Dilip P. Vasudevan, Yuanwei Fang, Amirali Shambayati

SIGARCH Comput. Archit. News, 2015

Fast support for unstructured data processing: the unified automata processor.

Yuanwei Fang, Tung Thanh Hoang, Michela Becchi, Andrew A. Chien

Proceedings of the 48th International Symposium on Microarchitecture, 2015

Does arithmetic logic dominate data movement? a systematic comparison of energy-efficiency for FFT accelerators.

Tung Thanh Hoang, Amirali Shambayati, Henry Hoffmann, Andrew A. Chien

Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2014

Performance and energy limits of a processor-integrated FFT accelerator.

Tung Thanh Hoang, Amirali Shambayati, Calvin Deutschbein, Henry Hoffmann, Andrew A. Chien

Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

2012

Data-Width-Driven Power Gating of Integer Arithmetic Circuits.

Tung Thanh Hoang, Per Larsson-Edefors

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

Viterbi Accelerator for Embedded Processor Datapaths.

Muhammad Waqar Azhar, Magnus Själander, Hasan Ali, Akshay Vijayashekar, Tung Thanh Hoang, Kashan Khurshid Ansari, Per Larsson-Edefors

Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012

2010

A High-Speed, Energy-Efficient Two-Cycle Multiply-Accumulate (MAC) Architecture and Its Application to a Double-Throughput MAC Unit.

Tung Thanh Hoang, Magnus Själander, Per Larsson-Edefors

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Cyclic Redundancy Checking (CRC) Accelerator for the FlexCore Processor.

Muhammad Waqar Azhar, Tung Thanh Hoang, Per Larsson-Edefors

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Design space exploration for an embedded processor with flexible datapath interconnect.

Tung Thanh Hoang, Ulf Jalmbrant, Erik der Hagopian, Kasyab P. Subramaniyan, Magnus Själander, Per Larsson-Edefors

Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

2009

High-speed, energy-efficient 2-cycle Multiply-Accumulate architecture.

Tung Thanh Hoang, Magnus Själander, Per Larsson-Edefors

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Double Throughput Multiply-Accumulate unit for FlexCore processor enhancements.

Tung Thanh Hoang, Magnus Själander, Per Larsson-Edefors

Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009