Katsunobu Nishimura

According to our database, Katsunobu Nishimura authored at least 4 papers between 1995 and 2004.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2004

Folded Fat H-Tree: An Interconnection Topology for Dynamically Reconfigurable Processor Array.

Yutaka Yamada, Hideharu Amano, Michihiro Koibuchi, Akiya Jouraku, Kenichiro Anjo, Katsunobu Nishimura

Proceedings of the Embedded and Ubiquitous Computing, 2004

1997

The RDT network router chip.

Hiroaki Nishi, Hideharu Amano, Katsunobu Nishimura, Kenichiro Anjo, Tomohiro Kudoh

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996

Distributed Shared Memory Architecture for JUMP-1: A General-Purpose MPP Prototype.

Takashi Matsumoto, Tomohiro Kudoh, Katsunobu Nishimura, Kei Hiraki, Hidehiko Tanaka

Proceedings of the 1996 International Symposium on Parallel Architectures, 1996

1995

Hierarchical Bit-Map Directory Schemes on the RDT Interconnection Network for a Massively Parallel Processor JUMP-1.

Tomohiro Kudoh, Hideharu Amano, Takashi Matsumoto, Kei Hiraki, Yulu Yang, Katsunobu Nishimura, Koichi Yoshimura, Yasuhito Fukushima

Proceedings of the 1995 International Conference on Parallel Processing, 1995