Kaushal Nigam

According to our database, Kaushal Nigam authored at least 6 papers between 2016 and 2023.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2023

Theoretical Investigation of Dual-Material Stacked Gate Oxide-Source Dielectric Pocket TFET Based on Interface Trap Charges and Temperature Variations.

Kaushal Nigam, Vinay Anand Tikkiwal, Mukesh Kumar Bind

J. Circuits Syst. Comput., October, 2023

Design and analysis of novel bilateral tunnelling based tunnel FET considering workfunction engineered metal strip for enhanced performance.

Priyanka Kwatra, Sajai Vir Singh, Kaushal Nigam

Microelectron. J., September, 2023

Sensitivity Assessment of Electrically Doped Cavity on Source Junctionless Tunnel Field-Effect Transistor-Based Biosensor.

Mukesh Kumar Bind, Kaushal Nigam, Sajai Vir Singh

J. Circuits Syst. Comput., January, 2023

2020

Temperature sensitivity analysis of SGO metal strip JL TFET.

Kaushal Nigam, Satyendra Kumar, Km Sucheta Singh, Eshaan Bhardwaj, Shubham Choubey, Savitesh Chaturvedi

IET Circuits Devices Syst., 2020

2019

Approach on electrically doped TFET for suppression of ambipolar and improving RF performance.

Bandi Venkata Chandan, Kaushal Nigam, Dheeraj Sharma

IET Circuits Devices Syst., 2019

2016

A 0.9V, 3.1-10.6 GHz CMOS LNA with high gain and wideband input match in 90 nm CMOS process.

Sunil Kumar Pandey, Pravin Neminath Kondekar, Kaushal Nigam, Dheeraj Sharma

Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016