Pravin Neminath Kondekar
According to our database1,
Pravin Neminath Kondekar
authored at least 20 papers
between 2013 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
Investigation of Analog/RF and linearity performance with self-heating effect in nanosheet FET.
Microelectron. J., September, 2023
Microelectron. J., 2023
Self-Heating Aware Threshold Voltage Modulation Conforming to Process and Ambient Temperature Variation for Reliable Nanosheet FET.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
Gate Oxide Induced Reliability Assessment of Junctionless FinFET-Based Hydrogen Gas Sensor.
Proceedings of the 2023 IEEE SENSORS, Vienna, Austria, October 29 - Nov. 1, 2023, 2023
2022
Negative capacitance based phase-transition FET for low power applications: Device-circuit co-design.
Microelectron. J., 2022
Substrate BOX engineering to mitigate the self-heating induced degradation in nanosheet transistor.
Microelectron. J., 2022
Insights into the operation of negative capacitance FinFET for low power logic applications.
Microelectron. J., 2022
Impact of Temperature on NDR Characteristics of a Negative Capacitance FinFET: Role of Landau Parameter (α).
Proceedings of the VLSI Design and Test - 26th International Symposium, 2022
2021
A Fast Settling, High Slew Rate CMOS Recycling Folded Cascode Operational Transconductance Amplifier (OTA) for High Speed Applications.
Proceedings of the 12th International Conference on Computing Communication and Networking Technologies, 2021
2019
Impact of PZT gate-stack induced negative capacitance on analogue/RF figures-of-merits of electrostatically-doped ferroelectric Schottky-barrier tunnel FET.
IET Circuits Devices Syst., 2019
Proceedings of the 10th International Conference on Computing, 2019
2018
A 3.1-10.6 GHz UWB LNA Based on Self Cascode Technique for Improved Bandwidth and High Gain.
Wirel. Pers. Commun., 2018
Wirel. Pers. Commun., 2018
2017
A 0.9 V, 4.57 mW UWB LNA with Improved Gain and Low Power Consumption for 3.1-10.6 GHz Ultra-Wide Band Applications.
Wirel. Pers. Commun., 2017
2016
Microelectron. J., 2016
A 0.9V, 3.1-10.6 GHz CMOS LNA with high gain and wideband input match in 90 nm CMOS process.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2015
Non-Hysteretic Behavior of Super Steep Ferroelectric Negative Capacitance Tunnel Field Effect Transistor Based on Body Profile Engineering.
J. Low Power Electron., 2015
2014
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
2013
Proceedings of the VLSI Design and Test, 17th International Symposium, 2013
Characteristics and sensitivity analysis of Gate Inside Junctionless Transistor (GI-JLT).
Proceedings of the 20th IEEE International Conference on Electronics, 2013