Kazuki Sunaga

According to our database, Kazuki Sunaga authored at least 5 papers between 2023 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2025

Performance and Power-Efficiency Improvements on Graph Embedding Using Sequential Training Algorithm and FPGA.

Kazuki Sunaga, Keisuke Sugiura, Hiroki Matsutani

IEICE Trans. Inf. Syst., 2025

Skip2-LoRA: A Lightweight On-device DNN Fine-tuning Method for Low-cost Edge Devices.

Hiroki Matsutani, Masaaki Kondo, Kazuki Sunaga, Radu Marculescu

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024

A Sequential Approach to Detect Drifts and Retrain Neural Networks on Resource-Limited Edge Devices.

Kazuki Sunaga, Takeya Yamada, Hiroki Matsutani

IEICE Trans. Inf. Syst., 2024

An FPGA-Based Accelerator for Graph Embedding using Sequential Training Algorithm.

Kazuki Sunaga, Keisuke Sugiura, Hiroki Matsutani

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

2023

Addressing the Gap Between Training Data and Deployed Environment by On-Device Learning.

Kazuki Sunaga, Masaaki Kondo, Hiroki Matsutani

IEEE Micro, 2023