Keisuke Sugiura

According to our database, Keisuke Sugiura authored at least 29 papers between 2013 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2026

InstantFT: A Field-Programmable Gate Array-Based Runtime Subsecond Fine-Tuning of Convolutional Neural Network Models.

Keisuke Sugiura, Masaaki Kondo, Radu Marculescu, Hiroki Matsutani

IEEE Micro, 2026

Low-Latency Streaming for Immersive Remote Interaction with a Spherical Display.

Den Tabata, Taiga Kobori, Keisuke Sugiura, Yoshiki Yamaguchi, Ryouhei Tsugami, Toshihito Fujiwara, Tatsuya Fukui, Satoshi Narikawa

Proceedings of the International Conference on Computing, Networking and Communications, 2026

A Sub-Microsecond HuffYUV-Based FPGA Accelerator for Real-Time Video Compression over High-Bandwidth Networks.

Takeo Kurosawa, Keisuke Sugiura, Yoshiki Yamaguchi, Ryouhei Tsugami, Toshihito Fujiwara, Tatsuya Fukui, Satoshi Narikawa

Proceedings of the 23rd Consumer Communications & Networking Conference, 2026

2025

FPGA-accelerated Correspondence-free Point Cloud Registration with PointNet Features.

Keisuke Sugiura, Hiroki Matsutani

ACM Trans. Reconfigurable Technol. Syst., June, 2025

InstantFT: An FPGA-Based Runtime Subsecond Fine-tuning of CNN Models.

Keisuke Sugiura, Hiroki Matsutani

CoRR, June, 2025

PointODE: Lightweight Point Cloud Learning with Neural Ordinary Differential Equations on Edge.

Keisuke Sugiura, Mizuki Yasuda, Hiroki Matsutani

CoRR, June, 2025

ElasticZO: A Memory-Efficient On-Device Learning with Combined Zeroth- and First-Order Optimization.

Keisuke Sugiura, Hiroki Matsutani

CoRR, January, 2025

Performance and Power-Efficiency Improvements on Graph Embedding Using Sequential Training Algorithm and FPGA.

Kazuki Sunaga, Keisuke Sugiura, Hiroki Matsutani

IEICE Trans. Inf. Syst., 2025

Marker-Based Recognition for Autonomous Micro-Drone Flight: An FPGA-Optimized Feasibility Study.

Diego Marcelo Ramirez Jove, Keisuke Sugiura, Yoshiki Yamaguchi

Proceedings of the 33rd IFIP/IEEE International Conference on Very Large Scale Integration, 2025

Performance Comparison for CPU, FPGA, and GPU in CRS Format Conversion Processing.

Tomoya Yokono, Keisuke Sugiura, Yoshiki Yamaguchi

Proceedings of the 18th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2025

2024

An Integrated FPGA Accelerator for Deep Learning-Based 2D/3D Path Planning.

Keisuke Sugiura, Hiroki Matsutani

IEEE Trans. Computers, June, 2024

Development of Wall Hammering Inspection Systems Using Two-Wheeled Multi-Copters.

Shuto Seki, Keisuke Sugiura, Satoshi Nakano, Masao Watanabe, Manabu Yamada

J. Robotics Mechatronics, 2024

A Cost-Efficient FPGA Implementation of Tiny Transformer Model using Neural ODE.

Ikumi Okubo, Keisuke Sugiura, Hiroki Matsutani

CoRR, 2024

A Cost-Efficient FPGA-Based CNN-Transformer Using Neural ODE.

Ikumi Okubo, Keisuke Sugiura, Hiroki Matsutani

IEEE Access, 2024

A Scalable Secure Fault Tolerant Aggregation for P2P Federated Learning.

Yujiro Yahata, Keisuke Sugiura, Hiroki Matsutani

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

An FPGA-Based Accelerator for Graph Embedding using Sequential Training Algorithm.

Kazuki Sunaga, Keisuke Sugiura, Hiroki Matsutani

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

2023

A Low-Cost Neural ODE with Depthwise Separable Convolution for Edge Domain Adaptation on FPGAs.

Hiroki Kawakami, Hirohisa Watanabe, Keisuke Sugiura, Hiroki Matsutani

IEICE Trans. Inf. Syst., July, 2023

An Efficient Accelerator for Deep Learning-based Point Cloud Registration on FPGAs.

Keisuke Sugiura, Hiroki Matsutani

Proceedings of the 31st Euromicro International Conference on Parallel, 2023

An Edge-Server Partitioning Method for 3D LiDAR SLAM on FPGAs.

Mizuki Yasuda, Keisuke Sugiura, Ryuto Kojima, Hiroki Matsutani

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

A Lightweight Transformer Model using Neural ODE for FPGAs.

Ikumi Okubo, Keisuke Sugiura, Hiroki Kawakami, Hiroki Matsutani

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

2022

A Universal LiDAR SLAM Accelerator System on Low-Cost FPGA.

Keisuke Sugiura, Hiroki Matsutani

IEEE Access, 2022

dsODENet: Neural ODE and Depthwise Separable Convolution for Domain Adaptation on FPGAs.

Hiroki Kawakami, Hirohisa Watanabe, Keisuke Sugiura, Hiroki Matsutani

Proceedings of the 30th Euromicro International Conference on Parallel, 2022

P3Net: PointNet-based Path Planning on FPGA.

Keisuke Sugiura, Hiroki Matsutani

Proceedings of the International Conference on Field-Programmable Technology, 2022

2021

An FPGA Acceleration and Optimization Techniques for 2D LiDAR SLAM Algorithm.

Keisuke Sugiura, Hiroki Matsutani

IEICE Trans. Inf. Syst., 2021

Particle Filter-based vs. Graph-based: SLAM Acceleration on Low-end FPGAs.

Keisuke Sugiura, Hiroki Matsutani

CoRR, 2021

A unified accelerator design for LiDAR SLAM algorithms for low-end FPGAs.

Keisuke Sugiura, Hiroki Matsutani

Proceedings of the International Conference on Field-Programmable Technology, 2021

2017

An extension of Godunov SPH II: Application to elastic dynamics.

Keisuke Sugiura, Shu-ichiro Inutsuka

J. Comput. Phys., 2017

2016

An extension of Godunov SPH: Application to negative pressure media.

Keisuke Sugiura, Shu-ichiro Inutsuka

J. Comput. Phys., 2016

2013

Smart Meter Data Analysis for Power Theft Detection.

Daniel Nikolaev Nikovski, Zhenhua Wang, Alan Esenther, Hongbo Sun, Keisuke Sugiura, Toru Muso, Kaoru Tsuru

Proceedings of the Machine Learning and Data Mining in Pattern Recognition, 2013