Radu Marculescu

According to our database1, Radu Marculescu authored at least 201 papers between 1993 and 2019.

Collaborative distances:

Awards

IEEE Fellow

IEEE Fellow 2013, "For contributions to design and optimization of on-chip communication for embedded multicore systems".

Timeline

Legend:

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Article 
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Links

On csauthors.net:

Bibliography

2019
Learning-Based Application-Agnostic 3D NoC Design for Heterogeneous Manycore Systems.
IEEE Trans. Computers, 2019

EdgeAI: A Vision for Deep Learning in IoT Era.
CoRR, 2019

Towards Unifying Neural Architecture Space Exploration and Generalization.
CoRR, 2019

Work-in-Progress: A Simulation Framework for Domain-Specific System-on-Chips.
CoRR, 2019

Memory- and Communication-Aware Model Compression for Distributed Deep Learning Inference on IoT.
CoRR, 2019

Dream Distillation: A Data-Independent Model Compression Framework.
CoRR, 2019

NIF: A Framework for Quantifying Neural Information Flow in Deep Networks.
CoRR, 2019

MetaNN: accurate classification of host phenotypes from metagenomic data using neural networks.
BMC Bioinformatics, 2019

Machine Learning-Based Processor Adaptability Targeting Energy, Performance, and Reliability.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Bot Detection in Reddit Political Discussion.
Proceedings of the Fourth International Workshop on Social Sensing, 2019

2018
On-Chip Communication Network for Efficient Training of Deep Convolutional Networks on Heterogeneous Manycore Systems.
IEEE Trans. Computers, 2018

Climate Anomalies vs Air Pollution: Carbon Emissions and Anomaly Networks.
CoRR, 2018

A Dynamic Network and Representation LearningApproach for Quantifying Economic Growth fromSatellite Imagery.
CoRR, 2018

Learning-based Application-Agnostic 3D NoC Design for Heterogeneous Manycore Systems.
CoRR, 2018

Machine Learning and Manycore Systems Design: A Serendipitous Symbiosis.
IEEE Computer, 2018

Dimensionality Reduction via Community Detection in Small Sample Datasets.
Proceedings of the Advances in Knowledge Discovery and Data Mining, 2018

Hybrid on-chip communication architectures for heterogeneous manycore systems.
Proceedings of the International Conference on Computer-Aided Design, 2018

MetaNN: Accurate Classification of Host Phenotypes From Metagenomic Data Using Neural Networks.
Proceedings of the 2018 ACM International Conference on Bioinformatics, 2018

2017
Imitation Learning for Dynamic VFI Control in Large-Scale Manycore Systems.
IEEE Trans. VLSI Syst., 2017

Non-Stationary Bayesian Learning for Global Sustainability.
T-SUSC, 2017

MPLasso: Inferring microbial association networks using prior microbial knowledge.
PLoS Computational Biology, 2017

Towards cell-based therapeutics: A bio-inspired autonomous drug delivery system.
Nano Comm. Netw., 2017

On-Chip Communication Network for Efficient Training of Deep Convolutional Networks on Heterogeneous Manycore Systems.
CoRR, 2017

Machine Learning and Manycore Systems Design: A Serendipitous Symbiosis.
CoRR, 2017

3D NoC-Enabled Heterogeneous Manycore Architectures for Accelerating CNN Training: Performance and Thermal Trade-offs.
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017

Molecular communication with DNA cellular storage system.
Proceedings of the 4th ACM International Conference on Nanoscale Computing and Communication, 2017

HiCOMB Keynote.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Discovering Hidden Knowledge in Carbon Emissions Data: A Multilayer Network Approach.
Proceedings of the Discovery Science - 20th International Conference, 2017

Enhancing precipitation models by capturing multivariate and multiscale climate dynamics.
Proceedings of the 3rd International Workshop on Cyber-Physical Systems for Smart Water Networks, 2017

From Ideas to Social Signals: Spatiotemporal Analysis of Social Media Dynamics.
Proceedings of the 2nd International Workshop on Social Sensing, 2017

K-hop learning: a network-based feature extraction for improved river flow prediction.
Proceedings of the 3rd International Workshop on Cyber-Physical Systems for Smart Water Networks, 2017

Inferring Microbial Interactions from Metagenomic Time-series Using Prior Biological Knowledge.
Proceedings of the 8th ACM International Conference on Bioinformatics, 2017

2016
Wireless NoC and Dynamic VFI Codesign: Energy Efficiency Without Performance Penalty.
IEEE Trans. VLSI Syst., 2016

Performance Evaluation of NoC-Based Multicore Systems: From Traffic Analysis to NoC Latency Modeling.
ACM Trans. Design Autom. Electr. Syst., 2016

A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2016

Wireless NoC for VFI-Enabled Multicore Chip Design: Performance Evaluation and Design Trade-Offs.
IEEE Trans. Computers, 2016

Tolerance-based interaction: a new model targeting opinion formation and diffusion in social networks.
PeerJ Computer Science, 2016

An Autonomous and Adaptive Bacteria-based Drug Delivery System.
Proceedings of the 3rd ACM International Conference on Nanoscale Computing and Communication, 2016

nOS: A nano-sized distributed operating system for many-core embedded systems.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Autonomous and Adaptive Control of Populations of Bacteria Through Environment Regulation.
Proceedings of the Computational Methods in Systems Biology, 2016

Hybrid network-on-chip architectures for accelerating deep learning kernels on heterogeneous manycore platforms.
Proceedings of the 2016 International Conference on Compilers, 2016

2015
Tolerance-based interaction: A new model targeting opinion formation and diffusion in social networks.
PeerJ PrePrints, 2015

Towards Autonomous Control of Molecular Communication in Populations of Bacteria.
Proceedings of the Second Annual International Conference on Nanoscale Computing and Communication, 2015

The (Low) Power of Less Wiring: Enabling Energy Efficiency in Many-Core Platforms Through Wireless NoC.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Statistical Learning in Chip (SLIC).
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Energy efficient MapReduce with VFI-enabled multicore platforms.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Molecular tweeting: unveiling the social network behind heterogeneous bacteria populations.
Proceedings of the 6th ACM Conference on Bioinformatics, 2015

2014
Exploiting Emergence in On-Chip Interconnects.
IEEE Trans. Computers, 2014

Miniature Devices in the Wild: Modeling Molecular Communication in Complex Extracellular Spaces.
IEEE Journal on Selected Areas in Communications, 2014

An efficient Network-on-Chip (NoC) based multicore platform for hierarchical parallel genetic algorithms.
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

Introduction to the special session on "Interconnect enhances architecture: Evolution of wireless NoC from planar to 3D".
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

Don't Let History Repeat Itself: Optimal Multidrug Quorum Quenching of Pathogens Network.
Proceedings of ACM The First Annual International Conference on Nanoscale Computing and Communication, 2014

SLIC: Statistical learning in chip.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

Low-latency wireless 3D NoCs via randomized shortcut chips.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Energy-efficient VFI-partitioned multicore design using wireless NoC architectures.
Proceedings of the 2014 International Conference on Compilers, 2014

A comprehensive and accurate latency model for Network-on-Chip performance analysis.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013
Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures
Lecture Notes in Electrical Engineering 184, Springer, ISBN: 978-94-007-3957-4, 2013

Dynamic power management for multidomain system-on-chip platforms: An optimal control approach.
ACM Trans. Design Autom. Electr. Syst., 2013

Pacemaker control of heart rate variability: A cyber physical system perspective.
ACM Trans. Embedded Comput. Syst., 2013

Bumpy Rides: Modeling the Dynamics of Chemotactic Interacting Bacteria.
IEEE Journal on Selected Areas in Communications, 2013

Efficient Modeling and Simulation of Bacteria-Based Nanonetworks with BNSim.
IEEE Journal on Selected Areas in Communications, 2013

Design of future integrated systems: A cyber-physical systems approach.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

Performance evaluation of multicore systems: from traffic analysis to latency predictions (embedded tutorial).
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

SVR-NoC: a performance analysis tool for network-on-chips using learning-based support vector regression model.
Proceedings of the Design, Automation and Test in Europe, 2013

Closed-loop control for power and thermal management in multi-core processors: formal methods and industrial practice.
Proceedings of the Design, Automation and Test in Europe, 2013

Message from the program co-chairs.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

Identifying dynamics and collective behaviors in microblogging traces.
Proceedings of the Advances in Social Networks Analysis and Mining 2013, 2013

A case for wireless 3D NoCs for CMPs.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
Technology-driven limits on runtime power management algorithms for multiprocessor systems-on-chip.
JETC, 2012

Dynamic power management for multicores: Case study using the intel SCC.
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

An Optimal Control Approach to Power Management for Multi-Voltage and Frequency Islands Multiprocessor Platforms under Highly Variable Workloads.
Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012

Implantable Pacemakers Control and Optimization via Fractional Calculus Approaches: A Cyber-Physical Systems Perspective.
Proceedings of the 2012 IEEE/ACM Third International Conference on Cyber-Physical Systems, 2012

Modeling populations of micro-robots for biological applications.
Proceedings of IEEE International Conference on Communications, 2012

A traffic-aware adaptive routing algorithm on a highly reconfigurable network-on-chip architecture.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

2011
Hitting Time Analysis for Fault-Tolerant Communication at Nanoscale in Future Multiprocessor Platforms.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2011

Non-Stationary Traffic Analysis and Its Implications on Multicore Platform Design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2011

Network-on-chip architectures and design methodologies.
Microprocessors and Microsystems - Embedded Hardware Design, 2011

Cyberphysical Systems: Workload Modeling and Design Optimization.
IEEE Design & Test of Computers, 2011

Special Issue on Networks-on-Chips: Design Flows and Case Studies.
Design Autom. for Emb. Sys., 2011

System interconnect design exploration for embedded MPSoCs.
Proceedings of the 2011 International Workshop on System Level Interconnect Prediction, 2011

A software framework for trace analysis targeting multicore platforms design.
Proceedings of the NOCS 2011, 2011

Dynamic power management of voltage-frequency island partitioned Networks-on-Chip using Intel's Single-chip Cloud Computer.
Proceedings of the NOCS 2011, 2011

Towards a Science of Cyber-Physical Systems Design.
Proceedings of the 2011 IEEE/ACM International Conference on Cyber-Physical Systems, 2011

Sustainability through massively integrated computing: Are we ready to break the energy efficiency wall for single-chip platforms?
Proceedings of the Design, Automation and Test in Europe, 2011

FARM: Fault-aware resource management in NoC-based multiprocessor platforms.
Proceedings of the Design, Automation and Test in Europe, 2011

A fractional calculus approach to modeling fractal dynamic games.
Proceedings of the 50th IEEE Conference on Decision and Control and European Control Conference, 2011

2010
An Analytical Approach for Network-on-Chip Performance Analysis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2010

Guest Editorial: Special Section on the ACM/IEEE Symposium on Networks-on-Chip 2009.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2010

Designing Heterogeneous Embedded Network-on-Chip Platforms With Users in Mind.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2010

Run-Time Task Allocation Considering User Behavior in Embedded Multiprocessor Networks-on-Chip.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2010

On-chip networks: Two sides of the same coin.
IEEE Design & Test of Computers, 2010

QuaLe: A Quantum-Leap Inspired Model for Non-stationary Analysis of NoC Traffic in Chip Multi-processors.
Proceedings of the NOCS 2010, 2010

Custom feedback control: enabling truly scalable on-chip power management for MPSoCs.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

Power management in multicore systems-on-chip.
Proceedings of the International Green Computing Conference 2010, 2010

Find your flow: increasing flow experience by designing "human" embedded systems.
Proceedings of the 47th Design Automation Conference, 2010

Unconventional fabrics, architectures, and models for future multi-core systems.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

Workload characterization and its impact on multicore platform design.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

2009
Design and Management of Voltage-Frequency Island Partitioned Networks-on-Chip.
IEEE Trans. VLSI Syst., 2009

Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2009

The Chip Is the Network: Toward a Science of Network-on-Chip Design.
Foundations and Trends in Electronic Design Automation, 2009

Toward a science for future NoC design.
Proceedings of the Second International Workshop on Network on Chip Architectures, 2009

User-centric design space exploration for heterogeneous Network-on-Chip platforms.
Proceedings of the Design, Automation and Test in Europe, 2009

Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: a system-level perspective.
Proceedings of the 46th Design Automation Conference, 2009

Statistical physics approaches for network-on-chip traffic characterization.
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009

2008
Enabling multimedia using resource-constrained video processing techniques: A node-centric perspective.
ACM Trans. Design Autom. Electr. Syst., 2008

Analysis and optimization of prediction-based flow control in networks-on-chip.
ACM Trans. Design Autom. Electr. Syst., 2008

Energy- and Performance-Aware Incremental Mapping for Networks on Chip With Multiple Voltage Levels.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2008

The Search for Alternative Computational Paradigms.
IEEE Design & Test of Computers, 2008

Guest Editors' Introduction: Tackling Key Problems in NoCs.
IEEE Design & Test of Computers, 2008

Hitting Time Analysis for Stochastic Communication.
Proceedings of the Nano-Net - Third International ICST Conference, 2008

Communication-Aware Face Detection Using Noc Architecture.
Proceedings of the Computer Vision Systems, 6th International Conference, 2008

Contention-aware application mapping for Network-on-Chip communication architectures.
Proceedings of the 26th International Conference on Computer Design, 2008

User-Aware Dynamic Task Allocation in Networks-on-Chip.
Proceedings of the Design, Automation and Test in Europe, 2008

Variation-adaptive feedback control for networks-on-chip with multiple clock domains.
Proceedings of the 45th Design Automation Conference, 2008

2007
Stochastic Communication: A New Paradigm for Fault-Tolerant Networks-on-Chip.
VLSI Design, 2007

System-level performance/power analysis for platform-based design of multimedia applications.
ACM Trans. Design Autom. Electr. Syst., 2007

On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus, and network-on-chip approaches.
ACM Trans. Design Autom. Electr. Syst., 2007

Minimizing Eavesdropping Risk by Transmission Power Control in Multihop Wireless Networks.
IEEE Trans. Computers, 2007

Challenges and Promising Results in NoC Prototyping Using FPGAs.
IEEE Micro, 2007

Energy-Aware Routing for E-Textile Applications
CoRR, 2007

Energy- and Performance-Driven NoC Communication Architecture Synthesis Using a Decomposition Approach
CoRR, 2007

Real-Time Anonymous Routing for Mobile Ad Hoc Networks.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2007

Towards Open Network-on-Chip Benchmarks.
Proceedings of the First International Symposium on Networks-on-Chips, 2007

Virtual Channels Planning for Networks-on-Chip.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Energy-efficient anonymous multicast in mobile ad-hoc networks.
Proceedings of the 13th International Conference on Parallel and Distributed Systems, 2007

Coordinated Distributed Power Management with Video Sensor Networks: Analysis, Simulation, and Prototyping.
Proceedings of the 2007 First ACM/IEEE International Conference on Distributed Smart Cameras, 2007

Distributed power-management techniques for wireless network video systems.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Analytical router modeling for networks-on-chip performance analysis.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip.
Proceedings of the 44th Design Automation Conference, 2007

Quantum-Like Effects in Network-on-Chip Buffers Behavior.
Proceedings of the 44th Design Automation Conference, 2007

Fresh air: the emerging landscape of design for networked embedded systems.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

Incremental run-time application mapping for homogeneous NoCs with multiple voltage levels.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

2006
"It's a small world after all": NoC performance optimization via long-range link insertion.
IEEE Trans. VLSI Syst., 2006

Computation and communication refinement for multiprocessor SoC design: A system-level perspective.
ACM Trans. Design Autom. Electr. Syst., 2006

System-Level Buffer Allocation for Application-Specific Networks-on-Chip Router Design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2006

On Optimization of E-Textile Systems Using Redundancy and Energy-Aware Routing.
IEEE Trans. Computers, 2006

Eavesdropping Minimization via Transmission Power Control in Ad-Hoc Wireless Networks.
Proceedings of the Third Annual IEEE Communications Society Conference on Sensor, 2006

Generalized Rate Analysis for Media-Processing Platforms.
Proceedings of the 12th IEEE Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2006), 2006

A Theoretical Framework for On-chip Stochastic Communication Analysis.
Proceedings of the 1st International ICST Conference on Nano-Networks, 2006

Communication architecture optimization: making the shortest path shorter in regular networks-on-chip.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Is "Network" the next "Big Idea" in design?
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Prediction-based flow control for network-on-chip traffic.
Proceedings of the 43rd Design Automation Conference, 2006

Design space exploration and prototyping for on-chip multimedia applications.
Proceedings of the 43rd Design Automation Conference, 2006

2005
Energy- and performance-aware mapping for regular NoC architectures.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2005

Hierarchical Adaptive Dynamic Power Management.
IEEE Trans. Computers, 2005

Application-specific network-on-chip architecture customization via long-range link insertion.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Energy- and Performance-Driven NoC Communication Architecture Synthesis Using a Decomposition Approach.
Proceedings of the 2005 Design, 2005

Energy-Aware Routing for E-Textile Applications.
Proceedings of the 2005 Design, 2005

Key research problems in NoC design: a holistic perspective.
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005

Communication-Centric SoC Design for Nanoscale Domain.
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

2004
On-chip traffic modeling and synthesis for MPEG-2 video applications.
IEEE Trans. VLSI Syst., 2004

Guest Editors' Introduction: Designing Real-Time Embedded Multimedia Systems.
IEEE Design & Test of Computers, 2004

Architecting voltage islands in core-based system-on-a-chip designs.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

Resource-aware video processing techniques for ambient multimedia systems.
Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004

Data partitioning techniques for pervasive multimedia platforms.
Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004

Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems.
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004

Application-specific buffer space allocation for networks-on-chip router design.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Hierarchical Adaptive Dynamic Power Management.
Proceedings of the 2004 Design, 2004

Distributed Multimedia System Design: A Holistic Perspective.
Proceedings of the 2004 Design, 2004

Energy-Aware Communication and Task Scheduling for Network-on-Chip Architectures under Real-Time Constraints.
Proceedings of the 2004 Design, 2004

Adaptive data partitioning for ambient multimedia.
Proceedings of the 41th Design Automation Conference, 2004

DyAD: smart routing for networks-on-chip.
Proceedings of the 41th Design Automation Conference, 2004

Enabling on-chip diversity through architectural communication design.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003
Modeling, Analysis, and Self-Management of Electronic Textiles.
IEEE Trans. Computers, 2003

Designing Application Specific Networks-On-Chip: Five easy pieces.
Proceedings of the IFIP VLSI-SoC 2003, 2003

Networks-On-Chip: The Quest for On-Chip Fault-Tolerant Communication.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Communication-Aware Task Scheduling and Voltage Selection for Total Systems Energy Minimization.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Fault-Tolerant Techniques for Ambient Intelligent Distributed Systems.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Ambient Intelligence Visions and Achievements: Linking Abstract Ideas to Real-World Concepts.
Proceedings of the 2003 Design, 2003

Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures.
Proceedings of the 2003 Design, 2003

On-Chip Stochastic Communication.
Proceedings of the 2003 Design, 2003

Energy-aware mapping for tile-based NoC architectures under performance constraints.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

Towards on-chip fault-tolerant communication.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Guest Editorial: Power Modeling, Estimation and Optimization in VLSI Systems.
Journal of Circuits, Systems, and Computers, 2002

System-Level Point-to-Point Communication Synthesis using Floorplanning Information.
Proceedings of the ASPDAC 2002 / VLSI Design 2002, 2002

Does Q=MC2? (On the Relationship between Quality in Electronic Design and the Model of Colloidal Computing, invited).
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

On-chip communication analysis for multimedia applications.
Proceedings of the 2002 IEEE International Conference on Multimedia and Expo, 2002

Traffic analysis for on-chip networks design of multimedia applications.
Proceedings of the 39th Design Automation Conference, 2002

Challenges and opportunities in electronic textiles modeling and optimization.
Proceedings of the 39th Design Automation Conference, 2002

2001
System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Probabilistic application modeling for system-level perfromance analysis.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

System-Level Power/Performance Analysis for Embedded Systems Design.
Proceedings of the 38th Design Automation Conference, 2001

2000
Theoretical bounds for switching activity analysis in finite-state machines.
IEEE Trans. VLSI Syst., 2000

Stochastic sequential machine synthesis with application to constrained sequence generation.
ACM Trans. Design Autom. Electr. Syst., 2000

Improving simulation efficiency for circuit-level power estimation [CMOS].
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Sequence compaction for power estimation: theory and practice.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1999

Non-stationary effects in trace-driven power analysis.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

1998
Probabilistic modeling of dependencies during switching activity analysis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1998

Theoretical bounds for switching activity analysis in finite-state machines.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

Trace-Driven Steady-State Probability Estimation in FSMs with Application to Power Estimation.
Proceedings of the 1998 Design, 1998

1997
Composite sequence compaction for finite-state machines using block entropy and high-order Markov models.
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997

Hierarchical Sequence Compaction for Power Estimation.
Proceedings of the 34st Conference on Design Automation, 1997

Sequence Compaction for Probabilistic Analysis of Finite-State Machines.
Proceedings of the 34st Conference on Design Automation, 1997

Adaptive models for input data compaction for power simulators.
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996
Information theoretic measures for power analysis [logic design].
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996

Improving the Efficiency of Power Simulators by Input Vector Compaction.
Proceedings of the 33st Conference on Design Automation, 1996

Stochastic Sequential Machine Synthesis Targeting Constrained Sequence Generation.
Proceedings of the 33st Conference on Design Automation, 1996

1995
Information theoretic measures of energy consumption at register transfer level.
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995

Efficient Power Estimation for Highly Correlated Input Streams.
Proceedings of the 32st Conference on Design Automation, 1995

1994
Switching activity analysis considering spatiotemporal correlations.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993
Worst-case analysis for pseudorandom testing.
Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993


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