Kazuya Ishida

According to our database, Kazuya Ishida authored at least 2 papers between 2004 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

Design and Implementation of a Configurable Heterogeneous Multicore SoC With Nine CPUs and Two Matrix Processors.

Hiroyuki Kondo, Masami Nakajima, Norio Masui, Sugako Otani, Naoto Okumura, Yukari Takata, Takashi Nasu, Hirokazu Takata, Takashi Higuchi, Mamoru Sakugawa, Hayato Fujiwara, Kazuya Ishida, Koichi Ishimi, Satoshi Kaneko, Teruyuki Itoh, Masayuki Sato, Osamu Yamamoto, Kazutami Arimoto

IEEE J. Solid State Circuits, 2008

2004

Design and Verification of Parallel Multipliers Using Arithmetic Description Language: ARITH.

Kazuya Ishida, Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi

Proceedings of the 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 2004