Sugako Otani

According to our database, Sugako Otani authored at least 16 papers between 2008 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

A CMOS Image Sensor and an AI Accelerator for Realizing Edge-Computing-Based Surveillance Camera Systems.

Fukashi Morishita, Norihito Kato, Satoshi Okubo, Takao Toi, Mitsuru Hiraki, Sugako Otani, Hideaki Abe, Yuji Shinohara, Hiroyuki Kondo

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2020

A 28-nm Automotive Flash Microcontroller With Virtualization-Assisted Processor Supporting ISO26262 ASIL D.

Hiroyuki Kondo, Yasuhisa Shimazaki, Masao Ito, Minoru Uemura, Toshihiro Hattori, Noriaki Sakamoto, Sugako Otani, Norimasa Otsuki, Yasufumi Suzuki, Naoto Okumura, Shohei Maeda, Tomonori Yanagita, Takao Koike, Kosuke Yayama

IEEE J. Solid State Circuits, 2020

A High-Precision Analog Front End Integrated in a 32bit Microcontroller for Industrial Sensing Applications.

Koji Yoichi, Sugako Otani, Kazutoshi Tsuda, Naoya Tokimoto, Hideki Kamegawa, Yoshihisa Satou, Shioto Tanaka, Hideki Otsu, Mitsuru Hiraki, Masao Ito, Mitsuya Fukazawa, Hiroyuki Kondo

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2019

A 28nm 600MHz Automotive Flash Microcontroller with Virtualization-Assisted Processor for Next-Generation Automotive Architecture Complying with ISO26262 ASIL-D.

Sugako Otani, Norimasa Otsuki, Yasufumi Suzuki, Naoto Okumura, Shohei Maeda, Tomonori Yanagita, Takao Koike, Yasuhisa Shimazaki, Masao Ito, Minoru Uemura, Toshihiro Hattori, Tadaaki Yamauchi, Hiroyuki Kondo

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018

Low-Power Multi-Sensor System with Power Management and Nonvolatile Memory Access Control for IoT Applications.

Masanori Hayashikoshi, Hideyuki Noda, Hiroyuki Kawai, Yasumitsu Murai, Sugako Otani, Koji Nii, Yoshio Matsuda, Hiroyuki Kondo

IEEE Trans. Multi Scale Comput. Syst., 2018

A Capacitance-to-Digital Converter Integrated in a 32bit Microcontroller for 3D Gesture Sensing.

Mitsuru Hiraki, Sugako Otani, Masao Ito, Takuya Mizokami, Masahiro Araki, Hiroyuki Kondo

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017

3.5 A 40nm flash microcontroller with 0.80µs field-oriented-control intelligent motor timer and functional safety system for next-generation EV/HEV.

Hayato Kimura, Hideyuki Noda, Hisaaki Watanabe, Takashi Higuchi, Ryosaku Kobayashi, Masayuki Utsuno, Fumitake Takami, Sugako Otani, Masayuki Ito, Yasuhisa Shimazaki, Naoki Yada, Hiroyuki Kondo

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2015

RX v2: Renesas's New-Generation MCU Processor.

Sugako Otani, Hiroyuki Kondo

IEICE Trans. Electron., 2015

2013

RXv2 processor core for low-power microcontrollers.

Sugako Otani, Naoshi Ishikawa, Hiroyuki Kondo

Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013

2011

Peach: A Multicore Communication System on Chip with PCI Express.

Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Toshihiro Hanawa, Shin'ichi Miura, Taisuke Boku

IEEE Micro, 2011

Low Power Platform for Embedded Processor LSIs.

Toru Shimizu, Kazutami Arimoto, Osamu Nishii, Sugako Otani, Hiroyuki Kondo

IEICE Trans. Electron., 2011

An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs.

Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Yasushi Hayakawa, Takeshi Oshita, Satoshi Kaneko, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

An 80 Gbps dependable multicore communication SoC with PCI express I/F and intelligent interrupt controller.

Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato

Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011

2009

Heterogeneous Multicore SoC With SiP for Secure Multimedia Applications.

Hiroyuki Kondo, Sugako Otani, Masami Nakajima, Osamu Yamamoto, Norio Masui, Naoto Okumura, Mamoru Sakugawa, Masaya Kitao, Koichi Ishimi, Masayuki Sato, Fumitaka Fukuzawa, Satoshi Imasu, Nobuhiro Kinoshita, Yusuke Ota, Kazutami Arimoto, Toru Shimizu

IEEE J. Solid State Circuits, 2009

2008

Design and Implementation of a Configurable Heterogeneous Multicore SoC With Nine CPUs and Two Matrix Processors.

Hiroyuki Kondo, Masami Nakajima, Norio Masui, Sugako Otani, Naoto Okumura, Yukari Takata, Takashi Nasu, Hirokazu Takata, Takashi Higuchi, Mamoru Sakugawa, Hayato Fujiwara, Kazuya Ishida, Koichi Ishimi, Satoshi Kaneko, Teruyuki Itoh, Masayuki Sato, Osamu Yamamoto, Kazutami Arimoto

IEEE J. Solid State Circuits, 2008

Heterogeneous multicore SoC for secure multimedia applications.

Hiroyuki Kondo, Masami Nakajima, Sugako Otani, Osamu Yamamoto, Norio Masui, Naoto Okumura, Mamoru Sakugawa, Masaya Kitao, Koichi Ishimi, Masayuki Sato, Fumitaka Fukuzawa, Kazuhiro Inaoka, Yoshihiro Saito, Kazutami Arimoto, Toru Shimizu

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008