Ke Wu
Orcid: 0000-0002-0625-3004Affiliations:
- National University of Defense Technology, College of Computer, Changsha, China
  According to our database1,
  Ke Wu
  authored at least 14 papers
  between 2019 and 2025.
  
  
Collaborative distances:
Collaborative distances:
Timeline
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Online presence:
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    on orcid.org
On csauthors.net:
Bibliography
  2025
    J. Parallel Distributed Comput., 2025
    
  
    Proceedings of the 33rd IEEE/ACM International Symposium on Quality of Service, 2025
    
  
  2024
COER: A Network Interface Offloading Architecture for RDMA and Congestion Control Protocol Codesign.
    
  
    ACM Trans. Archit. Code Optim., September, 2024
    
  
DRLAR: A deep reinforcement learning-based adaptive routing framework for network-on-chips.
    
  
    Comput. Networks, 2024
    
  
  2023
    Proceedings of the 37th International Conference on Supercomputing, 2023
    
  
    Proceedings of the 29th IEEE International Conference on Parallel and Distributed Systems, 2023
    
  
    Proceedings of the 7th Asia-Pacific Workshop on Networking, 2023
    
  
  2022
Revisiting network congestion avoidance through adaptive packet-chaining reservation.
    
  
    Comput. Networks, 2022
    
  
    Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022
    
  
  2021
    Proceedings of the Network and Parallel Computing, 2021
    
  
    Proceedings of the 2021 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Big Data & Cloud Computing, Sustainable Computing & Communications, Social Computing & Networking (ISPA/BDCloud/SocialCom/SustainCom), New York City, NY, USA, September 30, 2021
    
  
  2020
    Proceedings of the 22nd IEEE International Conference on High Performance Computing and Communications; 18th IEEE International Conference on Smart City; 6th IEEE International Conference on Data Science and Systems, 2020
    
  
  2019
    Proceedings of the 48th International Conference on Parallel Processing, 2019
    
  
PPS: A Low-Latency and Low-Complexity Switching Architecture Based on Packet Prefetch and Arbitration Prediction.
    
  
    Proceedings of the Algorithms and Architectures for Parallel Processing, 2019