Mingche Lai

According to our database, Mingche Lai authored at least 24 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Artificial Neural Network Based on Memristive Circuit for High-Speed Equalization.

Zhang Luo, Sichun Du, Zedi Zhang, Fangxu Lv, Qinghui Hong, Mingche Lai

IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024

Frequency Domain Modeling and Performance Analysis of Injection-Locked LC Oscillator.

Kewei Xin, Mingche Lai, Fangxu Lv, Xuqiang Zheng, Kaile Guo, Zhengbin Pang, Chaolong Xu, Geng Zhang, Wenchen Wang, Meng Li

IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

2023

A Unified Clock-Gated Error Correction Scheme With Three-Phase Latch-Based Pipeline for Energy-Efficient Wide Supply Voltage Range Router.

Bingxi Pei, Shi Xu, Zhang Luo, Qin Wang, Mingche Lai, Weifeng He

IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

A 50 Gb/s PAM-4 EAM driver in 28-nm CMOS technology.

Qiuyue Zhang, Xuqiang Zheng, Fangxu Lv, Zhaoyang Liu, Hua Xu, Weijie Li, Zhi Jin, Mingche Lai, Xinyu Liu

Microelectron. J., October, 2023

A Metastability Inference and Avoidance Technique for Near-Threshold-Voltage Network-on-Chip.

Lin Shao, Mingche Lai, Shi Xu, Chuxiong Lin, Weifeng He

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Low BER Cooperative-adaptive-equalizer for Serial Receiver in HPC Networks.

Mingche Lai, Fangxu Lv, Geng Zhang, Chaolong Xu

Proceedings of the IEEE International Conference on High Performance Computing & Communications, 2023

2022

A 33.33 Gb/s/wire pin-efficient 1.06 pJ/bit wireline transceiver based on CNRZ-5 for Chiplet in 28 nm CMOS.

Mingche Lai, Geng Zhang, Fangxu Lv, Xuqiang Zheng, Heming Wang, Dongbin Lv, Chaolong Xu, Xingyun Qi

Microelectron. J., 2022

Hierarchical photoelectric hybrid packet switching network for high-performance computing.

Bingxi Pei, Shi Xu, Zhang Luo, Qin Wang, Mingche Lai, Wei-Feng He

JOCN, 2022

A CNRZ-7 Based Wireline Transceiver With High-Bandwidth-Density, Low-Power for D2D Communication.

Geng Zhang, Mingche Lai, Fangxu Lyu, Xuqiang Zheng, Heming Wang, Dongbin Lv, Chaolong Xu, Xingyun Qi, Qing Liu

IEEE Access, 2022

In-Band Management Framework and Performance Evaluation for Interconnect Network in the TianHe Exascale Prototype System.

Jijun Cao, Mingche Lai, Lu Liu, Jiaqing Xu, Xiaoyue Hu

Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

2021

PFT: A Congestion Avoidance Method based on Proactive Flow Throttling at Endpoints.

Xingyun Qi, Mingche Lai, Dezun Dong, Yi Dai, Junsheng Chang, Jijun Cao

Proceedings of the 17th IFIP/IEEE International Symposium on Integrated Network Management, 2021

2020

A scalable smart router architecture with intelligent adaptive routing and fault-tolerant management.

Shi Xu, Mingche Lai, Yi Dai, Jijun Cao, Kefei Wang

Neurocomputing, 2020

Design of Converged Network Coding Layer for the Ethernet and HPC High-Speed Network.

Chao Wang, Weixia Xu, Mingche Lai, Jijun Cao

Proceedings of the 22nd IEEE International Conference on High Performance Computing and Communications; 18th IEEE International Conference on Smart City; 6th IEEE International Conference on Data Science and Systems, 2020

MPLEG: A Multi-mode Physical Layer Error Generator for Link Layer Fault Tolerance Test.

Xingyun Qi, Pingjing Lu, Jijun Cao, Yi Dai, Mingche Lai, Junsheng Chang

Proceedings of the Advanced Computer Architecture - 13th Conference, 2020

A 32 Gb/s Low Power Little Area Re-timer with PI Based CDR in 65 nm CMOS Technology.

Zhengbin Pang, Fangxu Lv, Weiping Tang, Mingche Lai, Kaile Guo, Yuxuan Wu, Tao Liu, Miaomiao Wu, Dechao Lu

Proceedings of the Advanced Computer Architecture - 13th Conference, 2020

Optimal Implementation of In-Band Network Management for High-Radix Switches.

Jijun Cao, Mingche Lai, Xingyun Qi, Yi Dai, Zhengbin Pang

Proceedings of the Advanced Computer Architecture - 13th Conference, 2020

2019

Efficient Management and Intelligent Fault Tolerance for HPC Interconnect Networks.

Jijun Cao, Mingche Lai, Zhang Luo, Jiaqing Xu, Zhengbin Pang

Proceedings of the 25th IEEE International Conference on Parallel and Distributed Systems, 2019

PPS: A Low-Latency and Low-Complexity Switching Architecture Based on Packet Prefetch and Arbitration Prediction.

Yi Dai, Ke Wu, Mingche Lai, Qiong Li, Dezun Dong

Proceedings of the Algorithms and Architectures for Parallel Processing, 2019

2018

Integrated High-Speed Optical SerDes over 100GBd Based on Optical Time Division Multiplexing.

Shi Xu, Zhang Luo, Mingche Lai, Zhengbin Pang, Renfa Li

ACM J. Emerg. Technol. Comput. Syst., 2018

Optimize the Power Consumption and SNR of the 3D Photonic High-Radix Switch Architecture Based on Extra Channels and Redundant Rings.

Jie Jian, Mingche Lai, Liquan Xiao

J. Comput. Networks Commun., 2018

2016

A Fast Hierarchical Arbitration in Optical Network-on-Chip Based on Multi-Level Priority QoS.

Jie Jian, Mingche Lai, Liquan Xiao

IEICE Trans. Commun., 2016

A High-Radix Switch Architecture Based on Silicon Photonic and 3D Integration.

Jie Jian, Liquan Xiao, Mingche Lai, Shi Xu

Proceedings of the Computer Engineering and Technology - 20th CCF Conference, 2016

Graphein: A Novel Optical High-Radix Switch Architecture for 3D Integration.

Jie Jian, Mingche Lai, Liquan Xiao, Weixia Xu

Proceedings of the Algorithms and Architectures for Parallel Processing, 2016

2015

A Low-Latency and High-Throughput Multiple-Level Arbitration Scheme Supporting Quality-of-Service in Optical On-chip Network.

Jie Jian, Mingche Lai, Liquan Xiao

Proceedings of the 8th International Workshop on Network on Chip Architectures, 2015