Ken-ichi Nitta

According to our database1, Ken-ichi Nitta authored at least 2 papers between 1996 and 1997.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1997
Instruction buffering to reduce power in processors for signal processing.
IEEE Trans. Very Large Scale Integr. Syst., 1997

1996
Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996


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